a4011.s

mips架构的bootloader,99左右的版本 但源代码现在没人更新了

/*************************************************************
 * File: lib/a4010.s
 * Purpose: Part of C runtime library
 * Author: Phil Bunce ([e-mail])
 * Revision History:
 *	970304	Start of revision history
 */

#ifndef LR4010
#define LR4010
#endif
#ifndef LR4011
#define LR4011
#endif
#include <mips.h>

	.comm k1tmp,4


	############# LR4011 #################
	#
	.globl a4011init
	.ent a4011init
a4011init:
	beq     a0,zero,1f
	j       c4011init
    1:

	# setup the CCC configuration register
	# enable: CMP, IIE, DIE, MUL, MAD, BGE, IPWE(1K), WB
	# Icache: 2 way set assoc, 8K set size
	# Dcache: 2 way set assoc, 8K set size
	# CCC <- 0000 0001 1111 0111 1111 1110 0010 0000
	#li	t0, 0x01f7fe20
	#li	t0, 0x01f7fe00		# w/o WB
	#li	t0, 0x0137fe00		# w/o WB,IIE,DIE
	li	t0, 0x0137fe20		# w/o IIE,DIE
	.set noreorder
	mtc0	t0, C0_CCC		# load the CP0 configuration register
	.set reorder

	# Initialize the Synchronous DRAM controller
	li 	t0, M_DRAM_CFG
	#li 	t1, 0x70114320
	li 	t1, 0x7033A753
	sw	t1, (t0)

	# set the CAS Latency
        li      t0, M_CL3		# CAS latency = 3
        sw      zero, (t0)

	# set Refresh rate
	li 	t0, M_DRAM_REFRESH
	li 	t1, 0x00000271		# at 40 Mhz 
	#li 	t1, 0x0000030a		# at 50 Mhz 
	#li 	t1, 0x000004d6		# at 80 MHz
	sw	t1, (t0)

#if 1
	# enable scbus bus error detection
	li	t0,M_SCBUS_ST
	li	t1,3
	sw	t1,(t0)
#endif

	# select the correct cache flushing routines
	la	s0,r4010_flush

	j	ra
	.end a4011init

/*************************************************************
*  a4011exception:
*	Called from _exception in mips.s. 
*	Return address is saved in k1.
*/
	.globl a4011exception
	.ent a4011exception
a4011exception:
	la	k0,k1tmp
	sw	k1,(k0)

        # check berr
        li      k0,M_SCBUS_ST
        lw      k1,(k0)
        li      k0,SCBUSST_BERR
        and     k0,k1
        beq     k0,zero,1f              # brif BERR not set
 
        # save EA
        li      k0,M_SCBUS_EA
        lw      k1,(k0)
        la      k0,saved_scbus_ea_4011
        sw      k1,(k0)
 
        # clear dberr
        li      k0,M_SCBUS_ST
        lw      k1,(k0)
        li      k0,SCBUSST_BERR
        or      k1,k0
        li      k0,M_SCBUS_ST
        sw      k1,(k0)
   1:
	la	k0,k1tmp
	lw	k1,(k0)
	j	k1
	.end a4011exception