usb.drc

一种U盘的Protel格式的电路原理图。

Protel Design System Design Rule Check
PCB File : \光盘\本书工程文件\CHAPTER13\usb.PcbDoc
Date     : 2006-4-17
Time     : 21:01:53

Processing Rule : Width Constraint (Min=0.2mm) (Max=0.3mm) (Prefered=0.3mm) (InNet('VCC') or InNet('VUSB') or InNet('GND'))
Rule Violations :0

Processing Rule : Clearance Constraint (Gap=0.2mm) (All),(All)
Rule Violations :0

Processing Rule : Width Constraint (Min=0.2mm) (Max=0.3mm) (Prefered=0.2mm) (All)
Rule Violations :0

Processing Rule : Hole Size Constraint (Min=0.0254mm) (Max=2.54mm) (All)
Rule Violations :0

Processing Rule : Broken-Net Constraint ( (All) )
Rule Violations :0

Processing Rule : Short-Circuit Constraint (Allowed=Not Allowed) (All),(All)
Rule Violations :0


Violations Detected : 0
Time Elapsed        : 00:00:02