routed board 1.drc

Protel2004电路设计从基础到实践 源代码

Protel Design System Design Rule Check
PCB File : \桌面\第9章实例\Routed BOARD 1.pcbdoc
Date     : 2005-11-11
Time     : 9:29:40

Processing Rule : Broken-Net Constraint ( (All) )
Rule Violations :0

Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
Rule Violations :0

Processing Rule : Clearance Constraint (Gap=13mil) (All),(All)
Rule Violations :0

Processing Rule : Width Constraint (Min=12mil) (Max=12mil) (Preferred=12mil) (All)
Rule Violations :0

Processing Rule : Width Constraint (Min=25mil) (Max=25mil) (Preferred=25mil) (InNetClass('Power'))
Rule Violations :0


Violations Detected : 0
Time Elapsed        : 00:00:01