📄 pll_d1.mdl
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IconDisplay "Port number"
LatchInput off
}
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BlockType Inport
Name "Max_in"
Position [65, 73, 95, 87]
Port "2"
IconDisplay "Port number"
LatchInput off
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Block {
BlockType Inport
Name "run_var_in"
Position [65, 208, 95, 222]
Port "3"
IconDisplay "Port number"
LatchInput off
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Block {
BlockType Inport
Name "1_max_in"
Position [65, 283, 95, 297]
Port "4"
IconDisplay "Port number"
LatchInput off
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Operator "sqrt"
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IconShape "round"
Inputs "|+-"
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Block {
BlockType Outport
Name "P-P"
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IconDisplay "Port number"
BusOutputAsStruct off
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Block {
BlockType Outport
Name "Variance"
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Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
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BlockType Outport
Name "1_max_out"
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Port "3"
IconDisplay "Port number"
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DstBlock "Sum"
DstPort 1
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DstBlock "Sum"
DstPort 2
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SrcBlock "Sum"
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DstBlock "P-P"
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DstBlock "Variance"
DstPort 1
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SrcBlock "run_var_in"
SrcPort 1
DstBlock "Math\nFunction"
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SrcBlock "1_max_in"
SrcPort 1
DstBlock "1_max_out"
DstPort 1
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Block {
BlockType Outport
Name "sampled"
Position [780, 23, 810, 37]
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "1 cycle max p-p"
Position [785, 303, 815, 317]
Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
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Block {
BlockType Outport
Name "N cycles"
Position [785, 123, 815, 137]
Port "3"
IconDisplay "Port number"
BusOutputAsStruct off
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Block {
BlockType Outport
Name "Variance1"
Position [785, 213, 815, 227]
Port "4"
IconDisplay "Port number"
BusOutputAsStruct off
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SrcBlock "in"
SrcPort 1
Points [195, 0]
Branch {
DstBlock "Gain"
DstPort 1
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Branch {
Points [0, 90]
Branch {
Points [0, 120]
Branch {
DstBlock "Variance"
DstPort 1
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Branch {
Points [0, 100]
DstBlock "Difference"
DstPort 1
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Branch {
DstBlock "Subsystem1"
DstPort 1
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SrcBlock "Difference"
SrcPort 1
DstBlock "Abs"
DstPort 1
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SrcBlock "Abs"
SrcPort 1
Points [60, 0]
DstBlock "Maximum"
DstPort 1
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Line {
SrcBlock "sample_size"
SrcPort 1
DstBlock "reset control"
DstPort 1
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Line {
SrcBlock "reset control"
SrcPort 1
Points [30, 0]
Branch {
Points [0, 120]
DstBlock "Unit Delay"
DstPort 1
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Branch {
Points [0, -105; 395, 0]
DstBlock "sampled quantities"
DstPort trigger
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Branch {
DstBlock "Subsystem1"
DstPort 2
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SrcBlock "sampled quantities"
SrcPort 1
DstBlock "Gain1"
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SrcBlock "Variance"
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DstBlock "sampled quantities"
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SrcBlock "sampled quantities"
SrcPort 2
DstBlock "Gain2"
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SrcBlock "Unit Delay"
SrcPort 1
Points [90, 0]
Branch {
Points [0, -20]
DstBlock "Variance"
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Branch {
Points [0, 50]
DstBlock "Maximum"
DstPort 2
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SrcBlock "Maximum"
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DstBlock "sampled quantities"
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Line {
SrcBlock "sampled quantities"
SrcPort 3
DstBlock "Gain3"
DstPort 1
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Line {
SrcBlock "Gain"
SrcPort 1
DstBlock "sampled"
DstPort 1
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Line {
SrcBlock "Gain1"
SrcPort 1
DstBlock "N cycles"
DstPort 1
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Line {
SrcBlock "Gain2"
SrcPort 1
DstBlock "Variance1"
DstPort 1
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Line {
SrcBlock "Gain3"
SrcPort 1
DstBlock "1 cycle max p-p"
DstPort 1
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Line {
SrcBlock "Subsystem1"
SrcPort 2
Points [50, 0; 0, 35; 85, 0]
DstBlock "sampled quantities"
DstPort 2
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Line {
SrcBlock "Subsystem1"
SrcPort 1
DstBlock "sampled quantities"
DstPort 1
}
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Block {
BlockType Constant
Name "unity"
Position [260, 123, 280, 147]
OutDataTypeMode "double"
}
Block {
BlockType Outport
Name "p-p ps cycle to cycle"
Position [850, 168, 880, 182]
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "p-p ps"
Position [850, 213, 880, 227]
Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "RMS ps"
Position [850, 258, 880, 272]
Port "3"
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
Name "dut"
Labels [1, 0]
SrcBlock "DUT"
SrcPort 1
Points [485, 0]
DstBlock "sampler & process"
DstPort trigger
}
Line {
Name "ref"
Labels [0, 0; 1, 0]
SrcBlock "REF"
SrcPort 1
DstBlock "Integrator"
DstPort 2
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Line {
Name "start to stop time"
Labels [0, 0]
SrcBlock "Integrator"
SrcPort 1
DstBlock "sampler & process"
DstPort 1
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Line {
SrcBlock "Sample_Size"
SrcPort 1
DstBlock "sampler & process"
DstPort 2
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Line {
SrcBlock "sampler & process"
SrcPort 3
DstBlock "p-p ps"
DstPort 1
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Line {
SrcBlock "sampler & process"
SrcPort 4
DstBlock "RMS ps"
DstPort 1
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Line {
SrcBlock "unity"
SrcPort 1
DstBlock "Integrator"
DstPort 1
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Line {
SrcBlock "sampler & process"
SrcPort 2
DstBlock "p-p ps cycle to cycle"
DstPort 1
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Line {
SrcBlock "sampler & process"
SrcPort 1
DstBlock "Terminator"
DstPort 1
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Block {
BlockType SubSystem
Name "Make Square1"
Ports [1, 1]
Position [410, 250, 440, 300]
Orientation "left"
ShowName off
TreatAsAtomicUnit off
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
MaskType "Make Square"
MaskDescription "For input +ve values output is 1\nFor input -ve"
" values output is 0"
MaskDisplay "plot(0,0,100,100,[90,70,70,50,50,30,30,10,10],["
"20,20,40,40,20,20,40,40,20],[90,87,84,80,76,73,70,67,63,60,57,53,50,47,44,40,"
"36,33,30,27,23,20,17,13,10],[70,65,63,62,63,65,70,75,77,78,77,75,70,65,63,62,"
"63,65,70,75,77,78,77,75,70])"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
System {
Name "Make Square1"
Location [459, 360, 767, 528]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
Block {
BlockType Inport
Name "In1"
Position [25, 33, 55, 47]
Port "1"
IconDisplay "Port number"
LatchInput off
}
Block {
BlockType Constant
Name "Constant"
Position [30, 80, 60, 110]
Value "0"
}
Block {
BlockType RelationalOperator
Name "Relational\nOperator"
Position [135, 32, 165, 63]
Operator ">"
}
Block {
BlockType Outport
Name "Out1"
Position [270, 43, 300, 57]
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "In1"
SrcPort 1
DstBlock "Relational\nOperator"
DstPort 1
}
Line {
SrcBlock "Constant"
SrcPort 1
Points [55, 0]
DstBlock "Relational\nOperator"
DstPort 2
}
Line {
SrcBlock "Relational\nOperator"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
}
}
Block {
BlockType Reference
Name "Manual Switch"
Ports [2, 1]
Position [510, 214, 535, 241]
SourceBlock "simulink/Signal\nRouting/Manual Switch"
SourceType "Manual Switch"
ShowPortLabels on
sw "0"
action "0"
}
Block {
BlockType SubSystem
Name "More Info1"
Ports []
Position [15, 360, 247, 400]
BackgroundColor "green"
DropShadow on
ShowName off
AncestorBlock "rab_favorites/More Info1"
TreatAsAtomicUnit off
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
MaskDisplay "disp(' x50 PLL model \\n with time and \\nfreq"
"uency domain measurements. ')"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
System {
Name "More Info1"
Location [255, 77, 933, 689]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
Annotation {
Name "This model multiplies the reference frequen"
"cy of 1 MHz by \na factor of 50 using a phase lock loop. It is virtually ide"
"ntical \nto the pll_d0.mdl but includes spectrum analyzers to monitor the VCO"
" \ncontrol voltage and VCO output signal. The VCO has a bandlimited phase \nn"
"oise generator with a 1/f spectral shape, set by an FIR filter, to⌨️ 快捷键说明
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