📄 base_band_spar.mdl
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ParameterDataType "sfix(16)"
ParameterScalingMode "Best Precision: Matrix-wise"
ParameterScaling "2^0"
OutDataTypeMode "Same as input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Goto
IconDisplay "Tag"
}
Block {
BlockType SignalConversion
OverrideOpt off
}
Block {
BlockType Inport
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
Interpolate on
}
Block {
BlockType Math
Operator "exp"
OutputSignalType "auto"
SampleTime "-1"
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
}
Block {
BlockType "M-S-Function"
MFile "mlfile"
}
Block {
BlockType Mux
Inputs "4"
DisplayOption "none"
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType Outport
Port "1"
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType PMComponent
SubClassName "unknown"
}
Block {
BlockType PMIOPort
}
Block {
BlockType Probe
ProbeWidth on
ProbeSampleTime on
ProbeComplexSignal on
ProbeSignalDimensions off
ProbeFramedSignal off
ProbeWidthDataType "double"
ProbeSampleTimeDataType "double"
ProbeComplexityDataType "double"
ProbeDimensionsDataType "double"
ProbeFrameDataType "double"
}
Block {
BlockType Product
Inputs "2"
Multiplication "Element-wise(.*)"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType RateTransition
Integrity on
Deterministic on
X0 "0"
OutPortSampleTime "-1"
}
Block {
BlockType Selector
InputType "Vector"
IndexMode "One-based"
ElementSrc "Internal"
Elements "1"
RowSrc "Internal"
Rows "1"
ColumnSrc "Internal"
Columns "1"
InputPortWidth "-1"
IndexIsStartValue off
OutputPortSize "1"
}
Block {
BlockType "S-Function"
FunctionName "system"
SFunctionModules "''"
PortCounts "[]"
}
Block {
BlockType StateSpace
A "1"
B "1"
C "1"
D "1"
X0 "0"
AbsoluteTolerance "auto"
Realization "auto"
}
Block {
BlockType SubSystem
ShowPortLabels on
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType Switch
Criteria "u2 >= Threshold"
Threshold "0"
InputSameDT on
OutDataTypeMode "Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType ToWorkspace
VariableName "simulink_output"
MaxDataPoints "1000"
Decimation "1"
SampleTime "0"
FixptAsFi off
}
Block {
BlockType UniformRandomNumber
Minimum "-1"
Maximum "1"
Seed "0"
SampleTime "-1"
VectorParams1D on
}
Block {
BlockType ZeroOrderHold
SampleTime "1"
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "base_band_spar"
Location [75, 248, 600, 448]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Constant
Name "0"
Position [90, 90, 105, 110]
Value "0"
}
Block {
BlockType Constant
Name "1"
Position [65, 71, 80, 89]
}
Block {
BlockType SubSystem
Name "Base Band RFNA"
Description "Spectrum Analyzer"
Ports [1, 0, 0, 0, 0, 0, 2]
Position [210, 53, 275, 122]
TreatAsAtomicUnit off
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
MaskPromptString "Bandwidth|FFT SIze (256,512,1024 etc)"
MaskStyleString "edit,edit"
MaskTunableValueString "on,on"
MaskCallbackString "|"
MaskEnableString "on,on"
MaskVisibilityString "on,on"
MaskToolTipString "on,on"
MaskVarAliasString ","
MaskVariables "BW=@1;Frame_Size=@2;"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
MaskValueString "1e9|256"
MaskTabNameString ","
System {
Name "Base Band RFNA"
Location [-153, 301, 689, 986]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
Block {
BlockType Inport
Name "Port Swap"
Position [210, 398, 240, 412]
Port "1"
IconDisplay "Port number"
LatchInput off
}
Block {
BlockType SubSystem
Name "Directional Bridge 3"
Ports [1, 1, 0, 0, 0, 0, 1]
Position [580, 473, 645, 542]
TreatAsAtomicUnit off
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
MaskPromptString "Zo="
MaskStyleString "edit"
MaskTunableValueString "on"
MaskEnableString "on"
MaskVisibilityString "on"
MaskToolTipString "on"
MaskVariables "Zo=@1;"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
MaskValueString "50"
Port {
PortNumber 1
Name "A"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
System {
Name "Directional Bridge 3"
Location [158, 391, 768, 693]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
Block {
BlockType Inport
Name "Drive"
Position [35, 28, 65, 42]
Port "1"
IconDisplay "Port number"
LatchInput off
}
Block {
BlockType Reference
Name "CVS"
Description "source block"
Ports [1, 0, 0, 0, 0, 1, 1]
Position [185, 24, 245, 66]
AttributesFormatString "\\n"
SourceBlock "powerlib/Electrical\nSources/Controlled"
" Voltage Source"
SourceType "Controlled Voltage Source"
ShowPortLabels on
Initialize off
SourceType "AC"
Amplitude "0"
Phase "0"
Frequency "0"
Measurements "None"
}
Block {
BlockType Reference
Name "G1"
Ports [0, 0, 0, 0, 0, 1]
Position [129, 85, 151, 110]
Orientation "down"
ShowName off
AttributesFormatString "\\n"
SourceBlock "powerlib/Elements/Ground"
SourceType "Ground"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "a"
}
Block {
BlockType Reference
Name "G2"
Ports [0, 0, 0, 0, 0, 1]
Position [329, 250, 351, 275]
Orientation "down"
ShowName off
AttributesFormatString "\\n"
SourceBlock "powerlib/Elements/Ground"
SourceType "Ground"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "a"
}
Block {
BlockType Reference
Name "R2"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [225, 91, 295, 119]
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "__new0"
RConnTagsString "__new0"
Resistance "Zo"
Inductance "0"
Capacitance "inf"
Measurements "None"
}
Block {
BlockType Reference
Name "R3"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [375, 91, 445, 119]
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "__new0"
RConnTagsString "__new0"
Resistance "Zo"
Inductance "0"
Capacitance "inf"
Measurements "None"
}
Block {
BlockType Reference
Name "R4"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [230, 181, 300, 209]
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "__new0"
RConnTagsString "__new0"
Resistance "Zo"
Inductance "0"
Capacitance "inf"
Measurements "None"
}
Block {
BlockType Reference
Name "VM"
Tag "PoWeRsYsTeMmEaSuReMeNt"
Ports [0, 1, 0, 0, 0, 2]
Position [360, 143, 385, 167]
AttributesFormatString "\\n"
SourceBlock "powerlib/Measurements/Voltage Measureme"
"nt"
SourceType "Voltage Measurement"
ShowPortLabels on
PhasorSimulation off
OutputType "Magnitude"
PSBequivalent "0"
}
Block {
BlockType PMIOPort
Name "Test Port"
Tag "PMCPort"
Position [550, 96, 580, 114]
Orientation "left"
Port "1"
Side "Right"
}
Block {
BlockType Outport
Name "rho"
Position [550, 148, 580, 162]
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
LineType "Connection"
SrcBlock "R2"
SrcPort RConn1
Points [0, 0; 20, 0]
Branch {
ConnectType "DEST_SRC"
DstBlock "R3"
DstPort LConn1
}
Branch {
ConnectType "DEST_DEST"
SrcBlock "CVS"
SrcPort RConn1
Points [70, 0; 0, 60]
}
}
Line {
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