📄 lc_filt_2.mdl
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MaskSelfModifiable on
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "normalized"
MaskValueString "Elliptic|Lowpass|8|BW*2*pi|80|2|100"
MaskTabNameString ",,,,,,"
}
Block {
BlockType StateSpace
Name "anti alias2"
Position [180, 212, 245, 268]
AncestorBlock "dsparch3/Analog\nFilter Design"
A "a"
B "b"
C "c"
D "d"
MaskType "Analog Filter Design"
MaskDescription "Design one of several standard analog filte"
"rs, implemented in state-space form."
MaskHelp "web(dspbhelp);"
MaskPromptString "Design method:|Filter type:|Filter order:|P"
"assband edge frequency (rads/sec):|(unused)|Passband ripple in dB:|Stopband a"
"ttenuation in dB:"
MaskStyleString "popup(Butterworth|Chebyshev I|Chebyshev II|"
"Elliptic|Bessel),popup(Lowpass|Highpass|Bandpass|Bandstop),edit,edit,edit,edi"
"t,edit"
MaskTunableValueString "on,on,off,on,on,on,on"
MaskCallbackString "dspblkanalog|dspblkanalog|||||"
MaskEnableString "on,on,on,on,on,on,on"
MaskVisibilityString "on,on,on,on,off,on,on"
MaskToolTipString "on,on,on,on,on,on,on"
MaskVarAliasString ",,,,,,"
MaskVariables "method=&1;filttype=&2;N=@3;Wlo=@4;Whi=@5;Rp"
"=@6;Rs=@7;"
MaskInitialization "[a,b,c,d,h,w,str]=dspblkanalog('design', me"
"thod,filttype,N,Wlo,Whi,Rp,Rs);\n"
MaskDisplay "plot(w,h); text(.05,.9,str);\n"
MaskSelfModifiable on
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "normalized"
MaskValueString "Elliptic|Lowpass|8|BW*2*pi|80|2|100"
MaskTabNameString ",,,,,,"
}
Block {
BlockType ZeroOrderHold
Name "sampler"
Position [215, 41, 250, 79]
SampleTime "1/(2.56*BW)"
}
Block {
BlockType ZeroOrderHold
Name "sampler1"
Position [215, 126, 250, 164]
SampleTime "1/(2.56*BW)"
}
Block {
BlockType Outport
Name "Excitation"
Position [300, 233, 330, 247]
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "Mag"
Position [475, 63, 505, 77]
Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "Phase"
Position [480, 123, 510, 137]
Port "3"
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "Transfer Function"
SrcPort 2
DstBlock "Phase"
DstPort 1
}
Line {
SrcBlock "Transfer Function"
SrcPort 1
DstBlock "Mag"
DstPort 1
}
Line {
SrcBlock "sampler1"
SrcPort 1
Points [15, 0; 0, -15]
DstBlock "Transfer Function"
DstPort 2
}
Line {
SrcBlock "sampler"
SrcPort 1
Points [15, 0; 0, 10]
DstBlock "Transfer Function"
DstPort 1
}
Line {
SrcBlock "anti alias2"
SrcPort 1
DstBlock "Excitation"
DstPort 1
}
Line {
SrcBlock "Uniform Random\nNumber"
SrcPort 1
DstBlock "anti alias2"
DstPort 1
}
Line {
SrcBlock "Response"
SrcPort 1
DstBlock "anti alias1"
DstPort 1
}
Line {
SrcBlock "anti alias1"
SrcPort 1
DstBlock "sampler1"
DstPort 1
}
Line {
SrcBlock "Reference "
SrcPort 1
DstBlock "anti alias"
DstPort 1
}
Line {
SrcBlock "anti alias"
SrcPort 1
DstBlock "sampler"
DstPort 1
}
Annotation {
Name "Bandlimited Excitation"
Position [216, 199]
}
}
}
Block {
BlockType Reference
Name "C1"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [261, 90, 279, 120]
Orientation "down"
NamePlacement "alternate"
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "__new0"
RConnTagsString "__new0"
Resistance "0"
Inductance "0"
Capacitance "c(1)"
Measurements "None"
}
Block {
BlockType Reference
Name "Controlled Voltage Source"
Ports [1, 0, 0, 0, 0, 1, 1]
Position [100, 18, 145, 67]
SourceBlock "powerlib/Electrical\nSources/Controlled Voltage"
" Source"
SourceType "Controlled Voltage Source"
ShowPortLabels on
Initialize off
SourceType "AC"
Amplitude "100"
Phase "0"
Frequency "0"
Measurements "Voltage"
}
Block {
BlockType Reference
Name "Ground"
Ports [0, 0, 0, 0, 0, 1]
Position [430, 250, 460, 280]
Orientation "down"
SourceBlock "powerlib/Elements/Ground"
SourceType "Ground"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "a"
}
Block {
BlockType Reference
Name "L3,C3"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [363, 70, 387, 160]
Orientation "down"
NamePlacement "alternate"
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "__new0"
RConnTagsString "__new0"
Resistance "0"
Inductance "l(3)"
Capacitance "c(3)"
Measurements "None"
}
Block {
BlockType Reference
Name "L5,C5"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [468, 75, 492, 165]
Orientation "down"
NamePlacement "alternate"
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "__new0"
RConnTagsString "__new0"
Resistance "0"
Inductance "l(5)"
Capacitance "c(5)"
Measurements "None"
}
Block {
BlockType Reference
Name "L7.C7"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [573, 75, 597, 165]
Orientation "down"
NamePlacement "alternate"
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "__new0"
RConnTagsString "__new0"
Resistance "0"
Inductance "l(7)"
Capacitance "c(7)"
Measurements "None"
}
Block {
BlockType Reference
Name "L9,C9\n"
Ports [0, 0, 0, 0, 0, 1, 1]
Position [678, 65, 702, 155]
Orientation "down"
NamePlacement "alternate"
SourceBlock "powerlib/Elements/Series RLC Branch"
SourceType "Series RLC Branch"
PhysicalDomain "powersysdomain"
SubClassName "unknown"
LeftPortType "p1"
RightPortType "p1"
LConnTagsString "__new0"
RConnTagsString "__new0"
Resistance "0"
Inductance "l(9)"
Capacitance "c(9)"
Measurements "None"
}
Block {
BlockType Reference
Name "LPF Magnitude dB"
Ports [1]
Position [365, 265, 400, 315]
SourceBlock "dspsnks4/Vector\nScope"
SourceType "Vector Scope"
ScopeProperties on
Domain "Frequency"
HorizSpan "1"
DisplayProperties off
AxisGrid on
Memory off
FrameNumber on
AxisLegend off
AxisZoom off
OpenScopeAtSimStart on
OpenScopeImmediately off
FigPos "[15 321 372 236]"
AxisProperties off
XUnits "Hertz"
XRange "[0...Fs/2]"
InheritXIncr on
XIncr "2*Fs"
XLabel "Time"
YUnits "dB"
YMin "-100"
YMax "10"
YLabel "dB"
LineProperties off
LineColors "[1 0 0]|[1 0 0]"
ShowPortLabels off
}
Block {
BlockType Reference
Name "LPF Phase in Degrees"
Ports [1]
Position [290, 295, 325, 345]
SourceBlock "dspsnks4/Vector\nScope"
SourceType "Vector Scope"
ScopeProperties on
Domain "Frequency"
HorizSpan "1"
DisplayProperties off
AxisGrid on
Memory off
FrameNumber on
AxisLegend off
AxisZoom off
OpenScopeAtSimStart on
OpenScopeImmediately off
FigPos "[16 37 372 236]"
AxisProperties off
XUnits "Hertz"
XRange "[0...Fs/2]"
InheritXIncr on
XIncr "1"
XLabel "Frequency"
YUnits "Magnitude"
YMin "-1000"
YMax "0"
YLabel "Phase in Degrees"
LineProperties off
LineColors "[1 0 0]"
ShowPortLabels off
}
Block {
BlockType SubSystem
Name "More Info2"
Ports []
Position [141, 387, 667, 494]
DropShadow on
ShowName off
OpenFcn "qsynth"
FontName "Arial"
FontSize 12
TreatAsAtomicUnit off
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
MaskDisplay "disp('1) Double click here to synthesize LC fil"
"ter. Use N=9, Rs=1 Rl=inf Fc=1e6 \\n 2) Synthesize the filter, do not close G"
"UI, then return to this model and start the simulation. \\n 3) The LC filter"
" is \"measured\" with the Base Band Transfer Function Estimator \\n ')"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "pixels"
System {
Name "More Info2"
Location [144, 77, 698, 541]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
}
}
Block {
BlockType Reference
Name "Voltage Measurement"
Ports [0, 1, 0, 0, 0, 2]
Position [760, 70, 800, 130]
SourceBlock "powerlib/Measurements/Voltage Measurement"
SourceType "Voltage Measurement"
ShowPortLabels on
PhasorSimulation off
OutputType "Magnitude"
PSBequivalent "0"
Port {
PortNumber 1
Name "Response"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
ShowSigGenPortName on
}
}
Line {
LineType "Connection"
SrcBlock "\nRs"
SrcPort RConn1
Points [0, 0]
Branch {
ConnectType "DEST_SRC"
DstBlock "C1"
DstPort LConn1
}
Branch {
ConnectType "DEST_SRC"
DstBlock "\nL2"
DstPort LConn1
}
}
Line {
LineType "Connection"
SrcBlock "\nL2"
SrcPort RConn1
Points [0, 0]
Branch {
ConnectType "DEST_SRC"
DstBlock "L3,C3"
DstPort LConn1
}
Branch {
ConnectType "DEST_SRC"
DstBlock "\nL4"
DstPort LConn1
}
}
Line {
LineType "Connection"
SrcBlock "\nL4"
SrcPort RConn1
Points [0, 0]
Branch {
ConnectType "DEST_SRC"
DstBlock "L5,C5"
DstPort LConn1
}
Branch {
ConnectType "DEST_SRC"
DstBlock "\nL6"
DstPort LConn1
}
}
Line {
LineType "Conne
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