📄 nand2k_x_hw.c
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/*
**********************************************************************
* Micrium, Inc.
* 949 Crestview Circle
* Weston, FL 33327-1848
*
* uC/FS
*
* (c) Copyright 2001 - 2006, Micrium, Inc.
* All rights reserved.
*
***********************************************************************
----------------------------------------------------------------------
File : NAND2k_X_HW.c
Purpose : Hardware layer sample for the large page NAND flash driver
----------------------------------------------------------------------
Known problems or limitations with current version
----------------------------------------------------------------------
None.
---------------------------END-OF-HEADER------------------------------
*/
/*********************************************************************
*
* #include Section
*
**********************************************************************
*/
#include "FS_ConfDefaults.h"
#if FS_USE_NAND2K_DRIVER
#include "NAND_2k_X_HW.h"
#include "NAND.h"
/*********************************************************************
*
* #define Macros
*
**********************************************************************
*/
/*********************************************************************
*
* Macros for setting the pin to configure card
*
* Please define here the sfr (special function register)
* of your processor.
*
*
**********************************************************************
*/
/* Port direction registers */
#define SET_DATA2INPUT()
#define SET_DATA2OUTPUT()
/*********************************************************************
*
* defines
*
**********************************************************************
*/
#define NAND_GET_DATA(Data)
#define NAND_SET_DATA(Data)
#define NAND_SET_ALE()
#define NAND_CLR_ALE()
#define NAND_SET_CE()
#define NAND_CLR_CE()
#define NAND_SET_CLE()
#define NAND_CLR_CLE()
#define NAND_SET_RE()
#define NAND_CLR_RE()
#define NAND_SET_WE()
#define NAND_CLR_WE()
#define NAND_GET_READY()
/*********************************************************************
*
* Static code
*
**********************************************************************
*/
/*********************************************************************
*
* Public code
*
**********************************************************************
*/
/*********************************************************************
*
* FS_NAND_HW_X_SetData
*/
void FS_NAND_HW_X_SetData(FS_U8 Unit) {
FS_USE_PARA(Unit);
/* nCE low, CLE low, ALE low */
NAND_CLR_CE();
NAND_CLR_CLE();
NAND_CLR_ALE();
}
/*********************************************************************
*
* FS_NAND_HW_X_SetCmd
*/
void FS_NAND_HW_X_SetCmd(FS_U8 Unit) {
FS_USE_PARA(Unit);
/* nCE low, CLE high, ALE low */
NAND_CLR_CE();
NAND_SET_CLE();
NAND_CLR_ALE();
}
/*********************************************************************
*
* FS_NAND_HW_X_SetAddr
*/
void FS_NAND_HW_X_SetAddr(FS_U8 Unit) {
FS_USE_PARA(Unit);
/* nCE low, CLE low, ALE high */
NAND_CLR_CE();
NAND_CLR_CLE();
NAND_SET_ALE();
}
/*********************************************************************
*
* FS_NAND_HW_X_SetStandby
*/
void FS_NAND_HW_X_SetStandby(FS_U8 Unit) {
/* nCE high, CLE low, ALE low */
NAND_SET_CE();
NAND_CLR_CLE();
NAND_CLR_ALE();
}
/*********************************************************************
*
* FS_NAND_HW_X_Read
*/
void FS_NAND_HW_X_Read(FS_U8 Unit, FS_U8 * pBuffer, unsigned NumBytes) {
SET_DATA2INPUT();
do {
NAND_CLR_RE(); /* RE is active low */
NAND_GET_DATA(*pBuffer);
pBuffer++;
NAND_SET_RE(); /* disable RE */
} while (--NumBytes);
}
/*********************************************************************
*
* FS_NAND_HW_X_Write
*/
void FS_NAND_HW_X_Write(FS_U8 Unit, const FS_U8 * pData, unsigned NumBytes) {
SET_DATA2OUTPUT();
do {
NAND_CLR_WE(); /* WE is active low */
NAND_SET_DATA(*pData);
pData++;
NAND_SET_WE(); /* disable WE */
} while (--NumBytes);
}
/*********************************************************************
*
* FS_NAND_HW_X_IsWriteProtected
*/
int FS_NAND_HW_X_IsWriteProtected(FS_U8 Unit) {
FS_USE_PARA(Unit);
return 0; /* Nand flash is not write protected*/
}
/*********************************************************************
*
* FS_NAND_HW_X_IsBusy
*/
int FS_NAND_HW_X_IsBusy(FS_U8 Unit) {
/* If hardware does not support checking RDY/BSY,
* we check status by asking the card.
*/
#if FS_NAND2K_SUPPORT_BUSYLINE_CHECK == 0
{
FS_U8 Cmd;
FS_U8 Busy;
Cmd = NAND_CMD_READ_STATUS;
FS_NAND_HW_X_SetCmd(Unit);
FS_NAND_HW_X_Write(Unit, &Cmd, 1);
FS_NAND_HW_X_SetData(Unit);
FS_NAND_HW_X_Read(Unit, &Busy, 1);
FS_NAND_HW_X_SetStandby(Unit);
if (Busy & 0x40) {
return 0;
}
return 1;
}
#else
/* Ready = high -> return 0
* Busy = low -> return 1
*/
;
return NAND_GET_READY() ? 0 : 1;
#endif
}
/*********************************************************************
*
* FS_NAND_HW_X_BusyLedOn
*/
void FS_NAND_HW_X_BusyLedOn(FS_U8 Unit) {
}
/*********************************************************************
*
* FS_NAND_HW_X_BusyLedOff
*/
void FS_NAND_HW_X_BusyLedOff(FS_U8 Unit) {
}
/*********************************************************************
*
* FS_NAND_HW_X_Init
*/
void FS_NAND_HW_X_Init(FS_U8 Unit) {
}
/*********************************************************************
*
* FS_NAND_HW_X_WaitTimer
*/
void FS_NAND_HW_X_Delayus(unsigned Period) {
}
#else
void NAND_2K_HW_c(void);
void NAND_2K_HW_c(void) {}
#endif
/**************************** end of file ***************************/
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