📄 mcp2510.h
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#ifndef __MCP2510_H__
#define __MCP2510_H__
#ifdef __cplusplus
extern "C" {
#endif
#define USEVIRTUAL 1
#define DEBUGMODE 1
#define U32 unsigned int
#define U16 unsigned short
#define WORD unsigned short
#define S16 short int
#define U8 unsigned char
#define BYTE unsigned char
#define S8 char
#ifndef MIN
#define MIN(x,y) ((x) < (y) ? (x) : (y))
#endif
#include <s2410.h>
#define PUBLIC
#define PRIVATE static
PRIVATE volatile IOPreg * v_pIOPregs;
PRIVATE volatile SSPreg * v_pSPI0regs;
PRIVATE volatile INTreg * v_pINTregs;
PRIVATE volatile PWMreg * v_pPWMregs;
#define DisEnINT(value) (v_pINTregs->rINTMSK |= (value))
#define EnINT(value) (v_pINTregs->rINTMSK &= ~(value))
#define ClearINTPnd(value) (v_pINTregs->rSRCPND = (value))
/***********************************************************************/
/*********************mcp2510 register define***************************/
/***********************************************************************/
//mcp2510's SPI command
#define CMD_WRITE 0x02
#define CMD_READ 0x03
#define CMD_BIT 0x05
#define CMD_TXB2 0x84
#define CMD_TXB1 0x82
#define CMD_TXB0 0x81
#define CMD_TXBT 0x87
#define CMD_STATE 0xa0
#define CMD_RESET 0xc0
//mcp2510's work mode
#define CONFIG_MODE 0x80
#define LISTEN_MODE 0x60
#define BACK_MODE 0x40
#define DOZE_MODE 0x20
#define NORMAL_MODE 0x00
// MACROS
#define CAN_CS_L() (v_pIOPregs->rGPGDAT &= ~(0x0001<<2)) //cs signal is low
#define CAN_CS_H() (v_pIOPregs->rGPGDAT |= (0x0001<<2)) //cs signal is high
#define CAN_CMD(cmd) (v_pSPI0regs->rSPTDAT0 = cmd) //write command
#define CAN_ADDR(addr) (v_pSPI0regs->rSPTDAT0 = addr) //write address
#define CAN_DATA_W(val) (v_pSPI0regs->rSPTDAT0 = val) //write value
#define CAN_DATA_R() ( v_pSPI0regs->rSPRDAT0 ) //read value
#define CAN_WAITRB() {while( !(v_pSPI0regs->rSPSTA0 & 0x01) );}//Is completed
//mcp2510 registers
//RXF0
#define RXF0SIDH 0x00
#define RXF0SIDL 0x01
#define RXF0EID8 0x02
#define RXF0EID0 0x03
//RXF1
#define RXF1SIDH 0x04
#define RXF1SIDL 0x05
#define RXF1EID8 0x06
#define RXF1EID0 0x07
//RXF2
#define RXF2SIDH 0x08
#define RXF2SIDL 0x09
#define RXF2EID8 0x0a
#define RXF2EID0 0x0b
//RXF3
#define RXF3SIDH 0x10
#define RXF3SIDL 0x11
#define RXF3EID8 0x12
#define RXF3EID0 0x13
//RXF4
#define RXF4SIDH 0x14
#define RXF4SIDL 0x15
#define RXF4EID8 0x16
#define RXF4EID0 0x17
//RXF5
#define RXF5SIDH 0x18
#define RXF5SIDL 0x19
#define RXF5EID8 0x1a
#define RXF5EID0 0x1b
//RXM0
#define RXM0SIDH 0x20
#define RXM0SIDL 0x21
#define RXM0EID8 0x22
#define RXM0EID0 0x23
//RXM1
#define RXM1SIDH 0x24
#define RXM1SIDL 0x25
#define RXM1EID8 0x26
#define RXM1EID0 0x27
#define BFPCTRL 0x0c
#define TXRTSCTRL 0x0d
#define CANSTAT 0x0e
#define CANCTRL 0x0f
#define TEC 0x1c
#define REC 0x1d
#define CNF3 0x28
#define CNF2 0x29
#define CNF1 0x2a
#define CANINTE 0x2b
#define CANINTF 0x2c
#define EFLG 0x2d
//TXB0
#define TXB0CTRL 0x30
#define TXB0SIDH 0x31
#define TXB0SIDL 0x32
#define TXB0EID8 0x33
#define TXB0EID0 0x34
#define TXB0DLC 0x35
#define TXB0D0 0x36
#define TXB0D1 0x37
#define TXB0D2 0x38
#define TXB0D3 0x39
#define TXB0D4 0x3a
#define TXB0D5 0x3b
#define TXB0D6 0x3c
#define TXB0D7 0x3d
//TXB1
#define TXB1CTRL 0x40
#define TXB1SIDH 0x41
#define TXB1SIDL 0x42
#define TXB1EID8 0x43
#define TXB1EID0 0x44
#define TXB1DLC 0x45
#define TXB1D0 0x46
#define TXB1D1 0x47
#define TXB1D2 0x48
#define TXB1D3 0x49
#define TXB1D4 0x4a
#define TXB1D5 0x4b
#define TXB1D6 0x4c
#define TXB1D7 0x4d
//TXB2
#define TXB2CTRL 0x50
#define TXB2SIDH 0x51
#define TXB2SIDL 0x52
#define TXB2EID8 0x53
#define TXB2EID0 0x54
#define TXB2DLC 0x55
#define TXB2D0 0x56
#define TXB2D1 0x57
#define TXB2D2 0x58
#define TXB2D3 0x59
#define TXB2D4 0x5a
#define TXB2D5 0x5b
#define TXB2D6 0x5c
#define TXB2D7 0x5d
//RXB0
#define RXB0CTRL 0x60
#define RXB0SIDH 0x61
#define RXB0SIDL 0x62
#define RXB0EID8 0x63
#define RXB0EID0 0x64
#define RXB0DLC 0x65
#define RXB0D0 0x66
#define RXB0D1 0x67
#define RXB0D2 0x68
#define RXB0D3 0x69
#define RXB0D4 0x6a
#define RXB0D5 0x6b
#define RXB0D6 0x6c
#define RXB0D7 0x6d
//RXB1
#define RXB1CTRL 0x70
#define RXB1SIDH 0x71
#define RXB1SIDL 0x72
#define RXB1EID8 0x73
#define RXB1EID0 0x74
#define RXB1DLC 0x75
#define RXB1D0 0x76
#define RXB1D1 0x77
#define RXB1D2 0x78
#define RXB1D3 0x79
#define RXB1D4 0x7a
#define RXB1D5 0x7b
#define RXB1D6 0x7c
#define RXB1D7 0x7d
//CANINTE register
#define MERRE 0x80
#define WAKIE 0x40
#define ERRIE 0x20
#define TX2IE 0x10
#define TX1IE 0x08
#define TX0IE 0x04
#define RX1IE 0x02
#define RX0IE 0x01
//CANINTF register
#define MERRF 0x80
#define WAKIF 0x40
#define ERRIF 0x20
#define TX2IF 0x10
#define TX1IF 0x08
#define TX0IF 0x04
#define RX1IF 0x02
#define RX0IF 0x01
//EFLG register
#define RX1OVR 0x80
#define RX0OVR 0x40
#define TXB0 0x20
#define TXEP 0x10
#define RXEP 0x08
#define TXWAR 0x04
#define RXWAR 0x02
#define EWARN 0x01
//
#define TXREQ0 0x04
#define TXREQ1 0x10
#define TXREQ2 0x40
typedef enum
{
INTR_NONE = 0,
INTR_RX0IF = RX0IF,
INTR_RX1IF = RX1IF,
INTR_TX0IF = TX0IF,
INTR_TX1IF = TX1IF,
INTR_TX2IF = TX2IF,
INTR_ERRIF = ERRIF,
INTR_WAKIF = WAKIF,
INTR_MERRF = MERRF,
} INTERRUPT_TYPE;
typedef enum
{
ERRIF_NONE = 0,
ERRIF_EWARN = EWARN,
ERRIF_RXWAR = RXWAR,
ERRIF_TXWAR = TXWAR,
ERRIF_RXEP = RXEP,
ERRIF_TXEP = TXEP,
ERRIF_TXB0 = TXB0,
ERRIF_RX0OVR = RX0OVR,
ERRIF_RX1OVR = RX1OVR,
} ERRIF_TYPE;
#ifdef __cplusplus
}
#endif
void t_cmd(U8 cmd);
void bit_cmd(U8 add, U8 mask, U8 data);
void w_cmd0(U8 add, U8 data);
void w_cmd(U8 add, U8* data, U8 d_long);
void r_cmd(U8 add, U8* data, U8 d_long);
void CAN_SetBaudRate(U8 cnf1, U8 cnf2, U8 cnf3);
void CAN_SetWordMode(U8 workmode);
void CAN_State(U8* data);
void CAN_Init(void);
void CAN_Reset(void);
U32 CAN_Send(U8* data, U32 datalength);
//U32 CAN_Rece(U8 index);
#endif⌨️ 快捷键说明
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