except.s

开发三星s3c44b0引导程序

;/**********************************************************************/
;/*                                                                    */
;/*   MODULE:      UADSLMCU/KS8947/except.s                            */
;/*   PURPOSE:     Exception cofiguration and vector definitions.      */
;/*   Description: S5N8947 BSP ver.1.0.                                */
;/*                                                                    */
;/*--------------------------------------------------------------------*/
;/*              COPYRIGHT 2001 SAMSUNG ELECTRONICS.                   */
;/*--------------------------------------------------------------------*/
;/*                                                                    */
;/*                                                                    */
;/**********************************************************************/


;/**********************************************************************/
;/*                                                                    */ 
;/*       Copyright (c) 2003 上海量子光电公司                          */
;/*                                                                    */
;/*                                                                    */
;/**********************************************************************/

        GET     board.inc

        AREA    INIT, CODE, READONLY

;************************************************************************
;* SetVector: Set up a hardware vector                                  *
;*                                                                      *
;* SYNTAX: void SetVector(long offset, void (*wrapper)(void));          *
;*                                                                      *
;* INPUTS: r0: vector number to install                                 *
;*         r1: address of wrapper                                       *
;*                                                                      *
;* The vector at the offset in R0 is initialised to a LDR PC,           * 
;* 0x20+offset. The location at 0x20+offset is written with the address *
;* of the wrapper. When all vectors have been initialised the vector    *
;* table will look like the following.                                  *
;*                                                                      *
;* 0x00  LDR     pc, 0x20                : RESET vector                 *
;* 0x04  LDR     pc, 0x24                : Undefined Instruction vector *
;* 0x08  LDR     pc, 0x28                : Software Interrupt vector    *
;* 0x0C  LDR     pc, 0x2C                : Prefetch Abort vector        *
;* 0x10  LDR     pc, 0x30                : Data Abort vector            *
;* 0x14  LDR     pc, 0x34                : Reserved vector              *
;* 0x18  LDR     pc, 0x38                : IRQ vector                   *
;* 0x1C  LDR     pc, 0x3C                : FIQ vector                   *
;* 0x20  DCD     RESETWrapper            : Soft vector table            *
;* 0x24  DCD     UndefWrapper                                           *
;* 0x28  DCD     SWIWrapper                                             *
;* 0x2C  DCD     PrefetchWrapper                                        *
;* 0x30  DCD     AbortWrapper                                           *
;* 0x34  DCD     ReservedWrapper                                        *
;* 0x38  DCD     IRQWrapper                                             *
;* 0x3C  DCD     FIQWrapper                                             *
;************************************************************************

;/----------------------------------------------------------------------/
;/ Write the wrapper address into the soft vector table                 /
;/----------------------------------------------------------------------/
        EXPORT  SetVector
SetVector
        LDR     r2, =EXTHND_BASE        ; defined in board.a (=0x1000000)
        STR     r1, [r2, r0]
        MOV     pc, lr                  ; RET


;************************************************************************
;* InstallVector: Initialises a hardware vector                         *    
;*                                                                      *
;* On entry: R0 = vector number to initialise                           *
;*                                                                      *
;*       0x00 = RESET                                                   *
;*       0x04 = Undefined instruction                                   *
;*       0x08 = Software interrupt                                      *
;*       0x0C = Prefetch Abort                                          *
;*       0x10 = Data Abort                                              *
;*       0x14 = Reserved (Address Exception in 26 bit mode)             *
;*       0x18 = IRQ                                                     *
;*       0x1C = FIQ                                                     *
;************************************************************************
        EXPORT  InstallVector
InstallVector
;/----------------------------------------------------------------------/
;/ Load the address of the table from the Default handler table below.  /
;/----------------------------------------------------------------------/
		LDR		r2, =DefaultHandlers
        LDR     r1, [r2, r0]
        B       SetVector


;************************************************************************
;* Default Exception Wrappers :                                         *    
;*                                                                      *
;* These vectors can be altered later as you want.                      *
;************************************************************************
        IMPORT  MainUndefHandler
        IMPORT  MainPrefetchHandler
        IMPORT  MainAbortHandler
        IMPORT  MainIntHandler

;/----------------------------------------------------------------------/
;/ Wrapper : Undefined exception.                                       /
;/----------------------------------------------------------------------/
UNDEFWrapper
	    STMFD   sp!, {r0-r12}
    	B       MainUndefHandler
	    LDMFD   sp!, {r0-r12, pc}^

;/----------------------------------------------------------------------/
;/ Wrapper : Swi exception.                                             /
;/----------------------------------------------------------------------/
        EXPORT  SWIWrapper
SWIWrapper
        STMFD   sp!, {r0-r12, lr}
        LDR     r0, [lr, #-4]
        BIC     r0, r0, #0xff000000
        CMP     r0, #0xff
        BEQ     MakeSVC
        LDMFD   sp!, {r0-r12, pc}^
MakeSVC
        MRS     r1, spsr
;        BIC     r1, r1, #ModeMask
;        ORR     r2, r1, #SVC32Mode
        MSR     spsr_csxf, r2
        LDMFD   sp!, {r0-r12, pc}^

;/----------------------------------------------------------------------/
;/ Wrapper : Prefetch abort exception.                                  /
;/----------------------------------------------------------------------/
PREFETCHWrapper
        STMFD   sp!, {r0-r12, lr}
        B       MainPrefetchHandler
        LDMFD   sp!, {r0-r12, lr}
        SUBS    pc, lr, #4

;/----------------------------------------------------------------------/
;/ Wrapper : Swi exception.                                             /
;/----------------------------------------------------------------------/
ABORTWrapper
        STMFD   sp!, {r0-r12, lr}
        B       MainAbortHandler
        LDMFD   sp!, {r0-r12, lr}
        SUBS    pc, lr, #8

;/----------------------------------------------------------------------/
;/ Wrapper : Reserved.                                                  /
;/----------------------------------------------------------------------/
RESERVEDWrapper
        SUBS    pc, lr, #4

;/----------------------------------------------------------------------/
;/ Wrapper : IRQ exception.                                             /
;/----------------------------------------------------------------------/
IRQWrapper
        STMFD   sp!, {r0-r12, lr}
;        LDR     r1, =INTOFFSET
        LDR     r0, [r1]
        BL      MainIntHandler
        LDMFD   sp!, {r0-r12, lr}
        SUBS    pc, lr, #4

;/----------------------------------------------------------------------/
;/ Wrapper : FIQ exception.                                             /
;/----------------------------------------------------------------------/
FIQWrapper
        STMFD   sp!, {r0-r7, lr}
;        LDR     r1, =INTOFFSET
        LDR     r0, [r1]
        BL      MainIntHandler
        LDMFD   sp!, {r0-r7, lr}
        SUBS    pc, lr, #4


        AREA    ROMDATA, DATA, READONLY

;/----------------------------------------------------------------------/
;/ Default exception handler vectors :                                  / 
;/ These vectors can be altered later as you want.                      / 
;/----------------------------------------------------------------------/
DefaultHandlers
        DCD     RESERVEDWrapper     ; Reset vector
        DCD     UNDEFWrapper        ; Undefined instruction
        DCD     SWIWrapper          ; SWI
        DCD     PREFETCHWrapper     ; Prefetch abort
        DCD     ABORTWrapper        ; Data abort
        DCD     RESERVEDWrapper     ; Address exception
        DCD     IRQWrapper          ; IRQ
        DCD     FIQWrapper          ; FIQ


        END