init.s

开发三星s3c44b0引导程序

;/ changed there.                                                       /
;/----------------------------------------------------------------------/
        MRS     r0, cpsr
        BIC     r0, r0, #PSR_Mode_Mask

        ORR     r1, r0, #PSR_FIQ_Mode
        MSR     cpsr_cxsf, r1
        LDR     sp, =BSP_FIQStack       ; Initialize SP of each mode

        ORR     r1, r0, #PSR_IRQ_Mode
        MSR     cpsr_cxsf, r1
        LDR     sp, =BSP_IRQStack

        ORR     r1, r0, #PSR_Undef_Mode
        MSR     cpsr_cxsf, r1
        LDR     sp, =BSP_UndefStack

        ORR     r1, r0, #PSR_Abort_Mode
        MSR     cpsr_cxsf, r1
        LDR     sp, =BSP_AbortStack

        ORR     r1, r0, #PSR_SVC_Mode
        MSR     cpsr_cxsf, r1
        LDR     sp, =BSP_SVCStack

;/----------------------------------------------------------------------/
;/ Install all the vectors :                                            /
;/ Each vector is set initially to point to a routine which will call   /
;/ SysInitFail with the name of the vector. For example                 /
;/ SysInitFail("Data Abort") for the Data Abort vector.                 /
;/ The vectors can be replaced later by calling InstallVector.          /
;/ However we initialise them to default values here so that if an      /
;/ exception occurs before initialisation is complete an error will be  /
;/ reported.                                                            /
;/----------------------------------------------------------------------/
        MOV     r0, #V_RESET            ; Excetption - Reset 
        BL      InstallVector           ; \bsps\devices\arm\vectors.s

        MOV     r0, #V_UNDEFINED        ; Excetption - Undefined
        BL      InstallVector

        MOV     r0, #V_SWI              ; Excetption - SWI
        BL      InstallVector
        
        MOV     r0, #V_PREFETCH         ; Excetption - Prefetch Abort
        BL      InstallVector

        MOV     r0, #V_DATAABORT        ; Excetption - Data Abort
        BL      InstallVector

        MOV     r0, #V_RESERVED         ; Excetption - Reserved
        BL      InstallVector

        MOV     r0, #V_IRQ              ; Excetption - IRQ 
        BL      InstallVector

        MOV     r0, #V_FIQ              ; Excetption - FIQ 
        BL      InstallVector

;/----------------------------------------------------------------------/
;/ Cache Flush & Enable if requested :                                  /
;/ When using ICE, cache has to be flushed and re-started.              /
;/----------------------------------------------------------------------/

    [ CACHE_ON
        LDR     r0, =0x11000000         ; Cache Flush
        MOV     r1, #0
        MOV     r2, #256                

Cache_Flush_Loop
        STR     r1, [r0], #4
        SUBS    r2, r2, #1
        BNE     Cache_Flush_Loop

Cache_Enable
        LDR     r0, =0x3FF0000		 
        LDR     r3, [r0]
        LDR     r1, =0x00000002          ; Start_addr = 0x3FF00000
        ORR     r2, r1, r3
        STR     r2, [r0]                ; Cache, Write Buffer Enable  
    ]

;/----------------------------------------------------------------------/
;/ Write Buffer Enable if requested :                                   /
;/ When using ICE, Write buffer enable.                                 /
;/----------------------------------------------------------------------/
	[ WBUFFER_ON
        LDR     r0, =0x3FF0000		 
        LDR     r3, [r0]
        LDR     r1, =0x00000004          ; Start_addr = 0x3FF00000
        ORR     r2, r1, r3
        STR     r2, [r0]                ; Write Buffer Enable  
	]

;/----------------------------------------------------------------------/
;/ Watch-dog Enable if requested :                                      /
;/ When using ICE, WDCON setting.						                /
;/----------------------------------------------------------------------/
	[ WDT_ON
        LDR     r0, =0x3ff601c         ; WDCON register
        LDR     r1, =0x9fffff00
        STR		r1,[r0]

	    NOP
        LDR		r1, [r0]
		ORR		r2,r1,#WDT_Enable
        STR		r2,[r0]					;Watch-dog timer enable
	]
		   
;/----------------------------------------------------------------------/
;/ Call SysInit, it should never return.                                /
;/----------------------------------------------------------------------/
        IMPORT  start_zooboot
SysStart
        BL       start_zooboot                 ; 

;/----------------------------------------------------------------------/
;/                                                                      /
;/                                                                      /
;/----------------------------------------------------------------------/
        ALIGN
        ;AREA    ROMDATA, DATA, READONLY

;/----------------------------------------------------------------------/
;/ System Memory Initialization Data :                                  / 
;/ For more, refer to the s5n8947 User's Manual and Programmer's Guide  / 
;/----------------------------------------------------------------------/
SystemInitData_SDRAM
        DCD		0x00003006			;32bit sdram data bus chenmeng 9.28(EXTDBWTH)
        DCD     0x02000060          ; 0x0000000 ~ 0x01FFFFF (ROMCON0)
        DCD     0x04008040          ; 0x0200000 ~ 0x03FFFFF (ROMCON1)
        DCD     0x06010040          ; 0x0400000 ~ 0x05FFFFF (ROMCON2)
        DCD     0x08018040          ; 0x0600000 ~ 0x07FFFFF (ROMCON3)
        
        DCD     0x20040380          ; 0x1000000 ~ 0x1FFFFFF (DRAMCON0)
        DCD     0x20080180          ; 0 (DRAMCON1)
        DCD     0x20080180          ; 0 (DRAMCON2)
        DCD     0x20080180          ; 0 (DRAMCON3)
        
        DCD     0xce278360          ; Refresh enable...     (REFEXTCON)
SystemInitDataSDRAM_S
		DCD		0x00003006 			; 32bit data bus for DRAM  (EXTDBWTH)
		DCD 	0x12040060 			; 0x1000000 ~ 0x11FFFFF, ROM0,2Mbyte,2cycle(ROMCON0)
		DCD		0x14048040			; 0x1200000 ~ 0x13FFFFF (ROMCON1)
		DCD     0x10040040          ; 0 (ROMCON2)
        DCD     0x10040040          ; 0 (ROMCON3)
        
		DCD 	0x10000380 			; 0x0000000 ~ 0x0FFFFFF, DRAM0 8M,
		DCD     0x20080180          ; 0 (DRAMCON1)
        DCD     0x20080180          ; 0 (DRAMCON2)
        DCD     0x20080180          ; 0 (DRAMCON3)
        
        DCD     0xce278360          ; Refresh enable...     (REFEXTCON)


;************************************************************************
; Define stack for different modes                                      *
;************************************************************************
        ALIGN

        AREA    SYS_STACK, NOINIT

        %       1024                ; stack for FIQ mode
BSP_FIQStack

        %       1024                ; stack for IRQ mode
BSP_IRQStack

        %       512                ; stack for Undefined mode
BSP_UndefStack

        %       512                 ; stack for Abort mode
BSP_AbortStack

        %       512                 ; stack for Supervisor (BSP Stack)
BSP_SVCStack

        %       2048                ; stack for Supervisor (BSP Stack)
BSP_UserStack


        END