at45.c

开发三星s3c44b0引导程序

#include <config.h>
#include <hardware.h>
#include <zooboot.h>

#ifdef CFG_DRIVER_AT45

#include "spi.h"
#include "at45.h"

#define CS PIO(6)

int dataflash_probe( void) {
   int dfcode;
   dfcode = get_dataflash_status(ID_MASK);
   return( dfcode);
}

int get_dataflash_status( char mask) {
   static pio_t * pioa = PIOA_BASE;
   char dfcode = 0;
   char get_status_mesg = CMD_READ_STATUS;
   pioa->codr = CS; /* Activate the SPI chip select */
   write_spi(&get_status_mesg, sizeof(get_status_mesg));
   read_spi(&dfcode, 1);
   pioa->sodr = CS; /* De-activate the SPI chip select */
   return( (int)(dfcode & mask));
}

int read_dataflash( dataflash_info_t * df_info, ulong addr, ulong size, char * result){
   char read_array_msg[8];
   ulong dfaddr = addr2dfaddr( df_info, addr);
   static pio_t * pioa = PIOA_BASE;
   read_array_msg[0] = CMD_READ_ARRAY;
   read_array_msg[1] = (char)(dfaddr>>16);
   read_array_msg[2] = (char)(dfaddr>>8);
   read_array_msg[3] = (char)(dfaddr);
   while ( !get_dataflash_status(RDY_MASK)); /* Add a timeout check here */
   pioa->codr = CS; /* Activate the SPI chip select */
   write_spi(read_array_msg, sizeof(read_array_msg));
   read_spi(result, size);
   pioa->sodr = CS; 
   return(size);
}

int write_dataflash( dataflash_info_t * df_info, ulong addr, ulong dest, ulong size) {
   char buffer = 0; /* two page buffers in most DataFlashes, numbered 0 and 1 */
   do {
      write_dataflash_buffer( df_info, buffer, &addr, &dest, &size);
      xfer_buffer_dataflash( df_info, &dest, buffer);
      buffer = buffer ? 0 : 1;
   } while ( size > 0);
   return 0;
}

void xfer_buffer_dataflash( dataflash_info_t * df_info, ulong * dest, char buffer) {
   static pio_t * pioa = PIOA_BASE;
   ulong paddr = addr2dfaddr(df_info, *dest);
   char xfer_buffer_dataflash_msg[4];
   xfer_buffer_dataflash_msg[0] = buffer ? CMD_BUF2_FLASH : CMD_BUF1_FLASH;
   xfer_buffer_dataflash_msg[1] = (char)(paddr>>16);
   xfer_buffer_dataflash_msg[2] = (char)(paddr>>8);
   while ( !get_dataflash_status(RDY_MASK)); /* Add a timeout check here */
   pioa->codr = CS; /* Activate the SPI chip select */
   write_spi(xfer_buffer_dataflash_msg, sizeof(xfer_buffer_dataflash_msg));
   pioa->sodr = CS; 
   /* update the destination pointer */
   paddr = (*dest & 0x00ffffff) / df_info->page_size;
   *dest = df_info->base + (paddr + 1) * df_info->page_size;
}

void write_dataflash_buffer( dataflash_info_t * df_info, char buffer, ulong * addr, ulong * dest, ulong * size) {
   static pio_t * pioa = PIOA_BASE;
   ulong baddr, count;
   char write_buffer_msg[4];
   baddr = (0x00ffffff & *dest) % (df_info->page_size);
   count = df_info->page_size - baddr;
   write_buffer_msg[0] = buffer ? CMD_BUF2_WRITE : CMD_BUF1_WRITE;
   write_buffer_msg[2] = (char)(baddr>>8);
   write_buffer_msg[3] = (char)baddr;
   count = (count > *size) ? *size : count;
   pioa->codr = CS; /* Activate the SPI chip select */
   write_spi(write_buffer_msg, sizeof(write_buffer_msg));
   write_spi(*addr, count);
   pioa->sodr = CS; 
   *size -= count;
   *addr += count;
}

ulong addr2dfaddr( dataflash_info_t * df_info, ulong addr) {
   ulong dfaddr;
   ulong page, baddr;

   addr &= 0x00ffffff; /* Masking logical base */
   page = addr / df_info->page_size;
   baddr = addr % df_info->page_size;
   switch (df_info->page_size) {
      case 528:
         dfaddr = (page << 10) | baddr;
         break;
      case 1056:
         dfaddr = (page << 11) | baddr;
         break;
      default:
         panic("Unknown page size: %d", df_info->page_size);
   }
   return( dfaddr);
}
#endif