target.h

MC9S12C32 LIN-BUS源码（编译环境：CodeWarriorV3.1）

/* ************************************************************************ */
/*                                                                          */
/*                  Volcano Communications technologies AB                  */
/*                            All rights reserved                           */
/*                                                                          */
/* ************************************************************************ */

/*         File: target.h 
 *  Description: Target specifics
 *
 */
#ifndef __TARGET_H__
#define __TARGET_H__

#include "peripherals.h"


typedef volatile l_u8 creg_u8;
typedef volatile l_u16 creg_u16;

/* These are target dependent macro that should enable/disable interrupts */
#define ENABLE_INTS()    l_sys_irq_restore((l_irqmask)0)
#define DISABLE_INTS()   l_sys_irq_disable()

#define PET_WATCHDOG()   Crg.armcop.byte = (l_u8)0x55;     \
                         Crg.armcop.byte = (l_u8)0xAA;

#define LSB(x)      ((l_u8)x)
#define MSB(x)      ((l_u8)(x>>8))

#define PORTB       Regs.portb.byte            /* # define PTB register base  */
#define DDRB        Regs.ddrb.byte             /* # define DDRB register base */

#define DDRJ        Pim.ddrj.byte              /* # define DDRJ register base */
#define PORTJ       Pim.ptj.byte               /* # define PTJ register base  */

/* HC912DP256 Register macros */
/* Timer registers */
#define TCNT        Timer.tcnt.word
#define TSCR        Timer.tscr1.byte
#define TMSK2       Timer.tscr2.byte

/* Port registers */
#define	PORTE_REG		Regs.porte.byte
#define	PORTE_DDR		Regs.ddre.byte

#define PORTK				Page.portk.byte
#define DDRK				Page.ddrk.byte

#define PORTH       (*(creg_u8 *)( 0x260))
#define DDRH        (*(creg_u8 *)( 0x262))

/* Volcano processing period is 5 ms in this application. Value given in 
 * number of microseconds. The busy_wait routine fails if PERIOD is
 * greater than 32767, i.e. don't use processing periods longer than 32 ms. */
#define HW_DELAY (5000u)
#define PERIOD HW_DELAY

#define RTI_DIVIDER 0x7F

/* Define the interrupt routines for Star12 using IAR compiler */
#define RTI_INTERRUPT_HANDLER 	        void rti_handler(void)
#define UART_0_RX_INTERRUPT_HANDLER 	void sci0_rx_handler(void)
#define UART_1_RX_INTERRUPT_HANDLER 	void sci1_rx_handler(void)

/* Function prototypes */

/* ************************************************************************
 * Perform initialisation of development system (if any)
 */
extern void init_environment(void);

/* ************************************************************************
 * Perform initialisation of target. Initialise a free running counter at
 * 1Mhz.
 */
void init_target(void);

/* ************************************************************************
 * Read timer channel A (free running counter at 1Mhz) and return current
 * value.
 */
l_u16 l_get_us_counter (void);


/* ************************************************************************
 * Restores interrupt level to the previous level, as indicated by the in-
 * put previous. On the CPU12 family the interrupt level can only be either
 * "interrupts enabled" or "interrupts disabled".
 */
void l_sys_irq_restore(l_irqmask previous);


/* ************************************************************************
 * Disable interrupts, and return the previous value of the interrupt
 * level.
 */
l_irqmask l_sys_irq_disable(void);

#endif /* __TARGET_H__ */