📄 l_gen.c
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/* LIN configuration File */
/* Automatically generated - DO NOT EDIT THIS FILE! */
/* (c) VCT 2002-2003 */
#include "l_gen.h"
/**** These calls shall be provided by the application ****/
extern L_LIB_PREFIX void l_sys_irq_restore(l_irqmask previous);
extern L_LIB_PREFIX l_irqmask l_sys_irq_disable(void);
/* RAM buffer for the flags */
L_RAM_PREFIX l_u8 L_RAM_POSTFIX l_flag_buffer[1] = {
0u
};
/* Flag list for frame 'demo_net.resolving' */
L_ROM_PREFIX l_flag L_ROM_POSTFIX l_flag_resolving[2] = {
{ &l_flag_buffer[0], 0x01u },
{(l_u8*) 0, 0u}
};
/* Subscribed frame 'demo_net.MasterReq_demo_net' */
L_RAM_PREFIX l_u8 L_RAM_POSTFIX l_frame_MasterReq_buf[8] = {
0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u
};
L_ROM_PREFIX l_slave_frame L_ROM_POSTFIX l_frame_MasterReq = {
l_frame_MasterReq_buf,
(l_flag *) 0,
L_DRX,
L_CLASSIC,
8u
};
/* Subscribed frame 'demo_net.global_info' */
L_RAM_PREFIX l_u8 L_RAM_POSTFIX l_frame_global_info_buf[1] = {
0x00u
};
L_ROM_PREFIX l_slave_frame L_ROM_POSTFIX l_frame_global_info = {
l_frame_global_info_buf,
(l_flag *) 0,
L_RX,
L_ENHANCED,
1u
};
/* Subscribed frame 'demo_net.resolving' */
L_RAM_PREFIX l_u8 L_RAM_POSTFIX l_frame_resolving_buf[1] = {
0x00u
};
L_ROM_PREFIX l_slave_frame L_ROM_POSTFIX l_frame_resolving = {
l_frame_resolving_buf,
l_flag_resolving,
L_RX,
L_ENHANCED,
1u
};
/* Published frame 'demo_net.SlaveResp_demo_net' */
L_RAM_PREFIX l_u8 L_RAM_POSTFIX l_frame_SlaveResp_buf[8] = {
0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u, 0x00u
};
L_ROM_PREFIX l_slave_frame L_ROM_POSTFIX l_frame_SlaveResp = {
l_frame_SlaveResp_buf,
(l_flag *) 0,
L_DTX,
L_CLASSIC,
8
};
/* Published frame 'demo_net.QY4_18' */
L_RAM_PREFIX l_u8 L_RAM_POSTFIX l_frame_QY4_18_buf[2] = {
0x00u, 0x00u
};
L_ROM_PREFIX l_slave_frame L_ROM_POSTFIX l_frame_QY4_18 = {
l_frame_QY4_18_buf,
(l_flag *) 0,
L_TX,
L_ENHANCED,
2
};
/* Message id map for interface i1*/
L_ROM_PREFIX l_u16 L_ROM_POSTFIX l_MID_list_siii[3] = {
0x50u, 0x60u, 0x1010u
};
L_RAM_PREFIX l_u8 L_RAM_POSTFIX l_PID_list_siii[3];
/* Interface 'i1' connected to network 'demo_net' */
L_RAM_PREFIX l_ifc_slave L_RAM_POSTFIX siii;
/* Library has single interface */
L_ROM_PREFIX l_uart_descriptor L_ROM_POSTFIX siii_uart_desc = {
0x0119u,
};
/* Routines for HC08 software UART function */
/*Constants for SW UART*/
#define rx_pin_address ((l_u8*near const)0x00)
#define tx_pin_address ((l_u8*near const)0x01)
#define rx_pin_ddr_address ((l_u8*near const)0x04)
#define tx_pin_ddr_address ((l_u8*near const)0x05)
#define timch_address ((l_u8*near const)0x28)
#define tim_address ((l_u8*near const)0x20)
#define rx_pin_position ((l_u8)(1<<1))
#define tx_pin_position ((l_u8)(1<<2))
#define tim_prescaler ((l_u8)0)
#define bit_time_adjustment ((l_u16)53)
#define min_bit_time ((l_u16)0x010du)
#define max_bit_time ((l_u16)0x0124u)
/* Variables for SW UART */
volatile l_u16 near uart_tmp16;
l_u16 near one_bit_time;
l_u16 near bit_time_measure;
l_u8 near bit_cnt;
l_u8 near itstatus;
l_u8 near rx_fg_buffer;
l_u8 near rx_bg_buffer;
l_u8 near tx_buffer;
l_u8 near tx_reference_buffer;
l_u8 near status_register;
/* itstatus values */
#define ADVANCE (0x01)
#define RECEIVE (0x02)
#define DATA (0x04)
#define STARTSTOP (0x08)
#define SWUART_IDLE (0 | 0 | 0 | 0 )
#define SWUART_STOPBIT_TX (0 | 0 | 0 | STARTSTOP)
#define SWUART_BIT_TIME (0 | RECEIVE | 0 | 0 )
#define SWUART_STOPBIT_RX (0 | RECEIVE | 0 | STARTSTOP)
#define SWUART_DATA_RX (ADVANCE | RECEIVE | DATA | 0 )
#define SWUART_LASTBIT_RX (ADVANCE | RECEIVE | 0 | 0 )
#define SWUART_STARTBIT_TX (ADVANCE | 0 | 0 | STARTSTOP)
#define SWUART_DATA_TX (ADVANCE | 0 | DATA | 0 )
#define SWUART_LASTBIT_TX (ADVANCE | 0 | 0 | 0 )
/* rx/tx opeartions */
#define GET_RX (*rx_pin_address & rx_pin_position)
#define SET_TX_LOW (*tx_pin_address &= ~tx_pin_position)
#define SET_TX_HIGH (*tx_pin_address |= tx_pin_position)
/* timer/interrupt bits */
#define TSTOP (1<<5)
#define TRST (1<<4)
#define CHxF (1<<7)
#define CHxIE (1<<6)
#define MSxB (1<<5)
#define MSxA (1<<4)
#define ELSxB (1<<3)
#define ELSxA (1<<2)
#define TOVx (1<<1)
#define CHxMAX (1<<0)
/* timer/interrupt operations */
#define START_TIMER (*tim_address = tim_prescaler)
#define STOP_TIMER (*tim_address = TSTOP)
#define CLEAR_TIMER_FLAG (*timch_address &= ~CHxF)
#define SET_IC_FALLING (*timch_address = CHxIE|ELSxB)
#define SET_IC_RISING (*timch_address = CHxIE|ELSxA)
#define SET_IC_COMPARE (*timch_address = CHxIE|MSxA)
#define SET_IC_DISABLE (*timch_address &= ~CHxIE)
#define GET_IC_COUNTER(a) a = (*(l_u16*near)(timch_address+1))
#define SET_IC_COUNTER(a) (*(l_u16*near)(timch_address+1)) = a
#define GET_TIM_COUNTER(a) a = (*(l_u16*near)(tim_address+1))
void uart_init(void)
/*Initializes the uart I/O interface (makes Rx pin to input and TX pin to
output) */
{
status_register = TX_EMPTY;
itstatus = SWUART_IDLE;
bit_time_measure = 0;
STOP_TIMER;
*(l_u16*)(tim_address+3) = 0xFFFF;
START_TIMER;
}
void uart_set_tx_high(void)
{
SET_TX_HIGH;
}
void uart_set_tx_low(void)
{
SET_TX_LOW;
}
l_u8 uart_get_rx(void)
{
return GET_RX;
}
void uart_connect(void)
{
*rx_pin_ddr_address &= ~rx_pin_position;
SET_TX_HIGH;
*tx_pin_ddr_address |= tx_pin_position;
SET_IC_FALLING;
}
void uart_set_baudrate(l_u16 br_value)
{
one_bit_time = br_value;
}
l_u16 uart_get_baudrate(void)
{
return (one_bit_time);
}
void uart_send_byte(l_u8 txdata)
/* Moves txdata to the internal txbuffer and initiates transmission. */
{
tx_buffer = txdata;
tx_reference_buffer = txdata;
GET_TIM_COUNTER(uart_tmp16);
SET_IC_COMPARE;
SET_IC_COUNTER(uart_tmp16 + one_bit_time);
status_register = 0;
if((itstatus != SWUART_IDLE) || !GET_RX)
{
status_register |= FRAMING_ERROR;
}
itstatus = SWUART_STARTBIT_TX;
bit_cnt = 8;
rx_bg_buffer = 0;
}
void uart_send_break(void)
/* Moves break to the internal txbuffer and initiates transmission. */
{
GET_TIM_COUNTER(uart_tmp16);
SET_IC_COMPARE;
SET_IC_COUNTER(uart_tmp16 + one_bit_time);
status_register = 0;
if((itstatus != SWUART_IDLE) || !GET_RX)
{
status_register |= FRAMING_ERROR;
}
tx_buffer = 0;
tx_reference_buffer = 0;
itstatus = SWUART_STARTBIT_TX;
bit_cnt = 12;
rx_bg_buffer = 0;
}
l_u8 uart_receive_byte(void)
{
return(rx_fg_buffer);
}
void uart_it_handler(void)
/* It is the interrupt handler of the sw uart state machine. It is called cca.
at every bit time. */
{
if(itstatus & ADVANCE)
{
GET_TIM_COUNTER(uart_tmp16);
SET_IC_COUNTER(uart_tmp16 + one_bit_time);
if(GET_RX)
{
rx_bg_buffer |= 0x80;
}
if (itstatus & RECEIVE)
{
if (itstatus & DATA)
{
/* SWUART_DATA_RX */
rx_bg_buffer >>= 1;
if((--bit_cnt) == 0)
{
itstatus = SWUART_LASTBIT_RX;
}
}
else
{
/* SWUART_LASTBIT_RX */
if((status_register & BT_MEASURE) && !(rx_bg_buffer & 0x80))
{
GET_TIM_COUNTER(bit_time_measure);
SET_IC_RISING;
CLEAR_TIMER_FLAG;
itstatus = SWUART_BIT_TIME;
return;
}
else
{
itstatus = SWUART_STOPBIT_RX;
}
}
}
else
{
if (itstatus & DATA)
{
/* SWUART_DATA_TX */
if(tx_buffer & 0x01)
{
SET_TX_HIGH;
}
else
{
SET_TX_LOW;
}
rx_bg_buffer >>= 1;
tx_buffer >>= 1;
if((--bit_cnt)==0)
{
itstatus = SWUART_LASTBIT_TX;
}
}
else if (itstatus & STARTSTOP)
{
/* SWUART_STARTBIT_TX */
SET_TX_LOW;
itstatus = SWUART_DATA_TX;
}
else
{
/* SWUART_LASTBIT_TX */
SET_TX_HIGH;
itstatus = SWUART_STOPBIT_TX;
}
}
CLEAR_TIMER_FLAG;
}
else
{
if (itstatus & RECEIVE)
{
if (itstatus & STARTSTOP)
{
/* SWUART_STOPBIT_RX */
if(!GET_RX)
{
status_register |= FRAMING_ERROR;
}
}
else
{
/* SWUART_BIT_TIME */
GET_IC_COUNTER(uart_tmp16);
bit_time_measure = uart_tmp16 - bit_time_measure;
status_register |= BT_RECALC;
}
}
else
{
if (itstatus & STARTSTOP)
{
/* SWUART_STOPBIT_TX */
if((!GET_RX)|| (tx_reference_buffer != rx_bg_buffer))
{
status_register |= FRAMING_ERROR;
}
status_register |= TX_EMPTY;
}
else
{
/* SWUART_IDLE */
rx_bg_buffer = 0;
GET_TIM_COUNTER(uart_tmp16);
uart_tmp16 += one_bit_time + one_bit_time/2 - bit_time_adjustment;
SET_IC_COMPARE;
SET_IC_COUNTER(uart_tmp16);
itstatus = SWUART_DATA_RX;
bit_cnt = 7;
CLEAR_TIMER_FLAG;
return;
}
}
status_register |= RX_FULL;
rx_fg_buffer = rx_bg_buffer;
itstatus = SWUART_IDLE;
SET_IC_FALLING;
CLEAR_TIMER_FLAG;
asm cli;
if (status_register & BT_RECALC)
{
bit_time_measure = (one_bit_time*8 - one_bit_time/2 + bit_time_measure) / 8;
if (bit_time_measure > min_bit_time && bit_time_measure < max_bit_time)
{
one_bit_time = bit_time_measure;
}
status_register &= ~BT_RECALC;
}
l_ifc_rx_i1();
}
}
l_u8 uart_get_status(void)
/* Returns information about the UART status. */
{
return(status_register);
}
void uart_clear_status(void)
/* Sets TX_EMPTY and clears RX_FULL, BREAK and FE flags */
{
status_register = TX_EMPTY;
}
void uart_halt(void)
/* Releases TX and RX pins, stops actual transmission or reception immediately. */
{
*rx_pin_ddr_address &= ~rx_pin_position;
SET_TX_HIGH;
*tx_pin_ddr_address |= tx_pin_position;
itstatus = SWUART_IDLE;
status_register = TX_EMPTY;
SET_IC_DISABLE;
}
L_ROM_PREFIX l_uart_descriptor_handle L_ROM_POSTFIX uuu = &siii_uart_desc;
L_ROM_PREFIX l_slave_rom L_ROM_POSTFIX siii_rom = {
&l_frame_QY4_18_buf[1],
&l_frame_QY4_18,
0x41u,
0x02u,
};
/* Reconfiguration related properties */
L_RAM_PREFIX ld2_ram_slave L_RAM_POSTFIX ld2_ram_sd_ifc;
L_ROM_PREFIX ld2_ifc_slave L_ROM_POSTFIX sd_ifc = {
0x000bu,
0x0021u,
{&l_flag_buffer[0], 0x02u},
0x01u,
0x03u,
};
/* Callout routines for giving processing time to layered support products*/
void l_callout_init_slave ()
{
ld2_init_slave ();
}
void l_callout_header_slave ()
{
(void) ld2_header_slave ();
}
void l_callout_response_slave (l_bool success)
{
(void) ld2_response_slave (success);
}
/* Search function for UART type 'hc08_swuart' */
l_slave_frame_handle l_header_to_frame_hc08_swuart(l_u8 hdr)
{
if (hdr == 0x3cu) /*MasterReq_demo_net*/
{
return &l_frame_MasterReq;
}
else if (hdr == 0x7du) /*SlaveResp_demo_net*/
{
if ((l_flag_buffer[0] & 0x02u))
{
l_flag_buffer[00000] &= ~0x02u;
return &l_frame_SlaveResp;
}
else
{
return (l_slave_frame_handle) 0;
}
}
else if (hdr == l_PID_list_siii[0x00u]) /*global_info*/
{
return &l_frame_global_info;
}
else if (hdr == l_PID_list_siii[0x01u]) /*resolving*/
{
return &l_frame_resolving;
}
else if (hdr == l_PID_list_siii[0x02u]) /*QY4_18*/
{
return &l_frame_QY4_18;
}
return (l_slave_frame_handle) 0;
}
/* end of l_gen.c */
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