ssp.h

ARM9基于WINDOWSCE的BSP源代码

/*
*   The content of this file or document is CONFIDENTIAL and PROPRIETARY
*   to Jade Technologies Co., Ltd.  It is subjected to the terms of a
*   License Agreement between Licensee and Jade Technologies Co., Ltd.
*   restricting among other things, the use, reproduction, distribution
*   and transfer.  Each of the embodiments, including this information 
*   and any derivative work shall retain this copyright notice.
* 
*   Copyright (c) 2004 - 2005 Jade Technologies Co., Ltd. 
*   All rights reserved.
** ----------------------------------------------------------------
** File:     SSP.h,v
** Revision: 1.1
** ----------------------------------------------------------------
** $ 
*/
#ifndef _SSP_H

#define _SSP_H

#define bit0 1<<0;
#define bit1 1<<1;
#define bit2 1<<2;
#define bit3 1<<3;
#define bit4 1<<4;
#define bit5 1<<5;
#define bit6 1<<6;
#define bit7 1<<7;
#define bit8 1<<8;
#define bit9 1<<9;
#define bit10 1<<10;
#define bit11 1<<11;
#define bit12 1<<12;
#define bit13 1<<13;
#define bit14 1<<14;
#define bit15 1<<15;

#ifdef DEBUG

#else
    #define ZONE_INIT       0
    #define ZONE_HARD       0
    #define ZONE_WRITE      0
    #define ZONE_READ       0
    #define ZONE_CHAIN      0
    #define ZONE_NOTHING2   0
    #define ZONE_THREAD     0
    #define ZONE_EVENTS     0
    #define ZONE_CRITSEC    0
    #define ZONE_FLOW       0
    #define ZONE_IR         0
    #define ZONE_NOTHING    0
    #define ZONE_ALLOC      0
    #define ZONE_FUNC       0
    #define ZONE_WARNING    0
    #define ZONE_ERROR      0
#endif

struct PL022
{
    volatile DWORD SSPCR0;
    volatile DWORD SSPCR1;
    volatile DWORD SSPDR;
    volatile DWORD SSPSR;
    volatile DWORD SSPCPSR;
    volatile DWORD SSPIMSC;
    volatile DWORD SSPRIS;
    volatile DWORD SSPMIS;
    volatile DWORD SSPICR;
    volatile DWORD SSPDMACR;
    DWORD SPP_PADDING[1006];
    DWORD SSPPeriphID0;
    DWORD SSPPeriphID1;
    DWORD SSPPeriphID2;
    DWORD SSPPeriphID3;
    DWORD SSPCellID0;
    DWORD SSPCellID1;
    DWORD SSPCellID2;
    DWORD SSPCellID3;
};

const unsigned long SSP_BASE = PHYS_SSP_BASE;


const DWORD kClockrate =0xF;
const DWORD kPrescale =20;
// SSPIMSC masks
const DWORD TXIM =bit3; // transmitt buffer half empty interrupt mask
const DWORD RXIM =bit2;  // receive buffer half full interrupt mask
const DWORD RTIM =bit1;  // receive time out interrupt mask
const DWORD RORIM =bit0; // Receive overrun interrupt mask
// SSPRIS
const DWORD TXRIS =bit3;    // transmitt buffer half empty interrupt mask
const DWORD RXRIS =bit2;  // receive buffer half full interrupt mask
const DWORD RTRIS =bit1;  // receive time out interrupt mask
const DWORD RORRIS =bit0; // Receive overrun interrupt mask
// SSPSR
const DWORD BSY =bit4;  // transmitt buffer half empty interrupt mask
const DWORD RFF =bit3;  // transmitt buffer half empty interrupt mask
const DWORD RNE =bit2;  // receive buffer half full interrupt mask
const DWORD TNF =bit1;  // receive time out interrupt mask
const DWORD TFE =bit0; // Receive overrun interrupt mask

// SSPCR0 masks
const DWORD apSSP_SCLKPHASE_TRAILINGEDGE = 0;
const DWORD apSSP_SCLKPHASE_LEADINGEDGE  = bit7;

const DWORD apSSP_SCLKPOLARITY_IDLELOW =0;
const DWORD apSSP_SCLKPOLARITY_IDLEHIGH = bit6;

const DWORD apSSP_FRAMEFORMAT_MOTOROLASPI =0;               /* Motorola SPI frame format */
const DWORD apSSP_FRAMEFORMAT_NATIONALMICROWIRE = bit5; 
const DWORD apSSP_FRAMEFORMAT_TISYNCHRONOUS = bit4;         /* TI synchronous serial frame format */

const DWORD apSSP_DATASIZE_4BITS  = 0x3;     /*  4 bit data */
const DWORD apSSP_DATASIZE_5BITS  = 0x4;     /*  5 bit data */
const DWORD apSSP_DATASIZE_6BITS  = 0x5;     /*  6 bit data */
const DWORD apSSP_DATASIZE_7BITS  = 0x6;     /*  7 bit data */
const DWORD apSSP_DATASIZE_8BITS  = 0x7;     /*  8 bit data */
const DWORD apSSP_DATASIZE_9BITS  = 0x8;     /*  9 bit data */
const DWORD apSSP_DATASIZE_10BITS = 0x9;     /* 10 bit data */
const DWORD apSSP_DATASIZE_11BITS = 0xA;     /* 11 bit data */
const DWORD apSSP_DATASIZE_12BITS = 0xB;     /* 12 bit data */
const DWORD apSSP_DATASIZE_13BITS = 0xC;     /* 13 bit data */
const DWORD apSSP_DATASIZE_14BITS = 0xD;     /* 14 bit data */
const DWORD apSSP_DATASIZE_15BITS = 0xE;     /* 15 bit data */
const DWORD apSSP_DATASIZE_16BITS = 0xF;     /* 16 bit data */


// SSPCR1 masks
const DWORD apSSP_SLAVEOUTPUTENABLED  = 0;      /* SSP may drive output in slave mode */
const DWORD apSSP_SLAVEOUTPUTDISABLED = bit3;   /* SSP must not drive output in slave mode */

const DWORD apSSP_MASTER = 0;                   /* Device is Master */
const DWORD apSSP_SLAVE  = bit2                 /* Device is Slave  */

const DWORD apSSP_LOOPBACKOFF = 0;              /* Loop back off, normal serial port operation */
const DWORD apSSP_LOOPBACKON  = bit0;

const DWORD apSSP_ENABLE  = bit1;

#endif //_SSP.H