📄 cfw_platform.c
字号:
{
case DMAC_CHANNEL_0:
// Clear down any outstanding interrupts
pDMACRegs->DMACIntTCClear = DMAC_CHANNEL_0_INT;
pDMACRegs->DMACIntErrClr = DMAC_CHANNEL_0_INT;
// Enable the terminal count interrupt
pDMACRegs->DMACC0Configuration |= (DWORD)DMAC_CHCONFIG_ITC;
// Enable the error interrupt
pDMACRegs->DMACC0Configuration |= (DWORD)DMAC_CHCONFIG_IE;
pHALir_EnableIrq(LOGINTR_DMA); // Enable interrupt.
break;
case DMAC_CHANNEL_1:
// Clear down any outstanding interrupts
pDMACRegs->DMACIntTCClear = DMAC_CHANNEL_1_INT;
pDMACRegs->DMACIntErrClr = DMAC_CHANNEL_1_INT;
// Enable the terminal count interrupt
pDMACRegs->DMACC1Configuration |= (DWORD)DMAC_CHCONFIG_ITC;
// Enable the error interrupt
pDMACRegs->DMACC1Configuration |= (DWORD)DMAC_CHCONFIG_IE;
pHALir_EnableIrq(LOGINTR_DMA); // Enable interrupt.
break;
case DMAC_CHANNEL_2:
// Clear down any outstanding interrupts
pDMACRegs->DMACIntTCClear = DMAC_CHANNEL_2_INT;
pDMACRegs->DMACIntErrClr = DMAC_CHANNEL_2_INT;
// Enable the terminal count interrupt
pDMACRegs->DMACC2Configuration |= (DWORD)DMAC_CHCONFIG_ITC;
// Enable the error interrupt
pDMACRegs->DMACC2Configuration |= (DWORD)DMAC_CHCONFIG_IE;
pHALir_EnableIrq(LOGINTR_DMA); // Enable interrupt.
break;
case DMAC_CHANNEL_3:
// Clear down any outstanding interrupts
pDMACRegs->DMACIntTCClear = DMAC_CHANNEL_3_INT;
pDMACRegs->DMACIntErrClr = DMAC_CHANNEL_3_INT;
// Enable the terminal count interrupt
pDMACRegs->DMACC3Configuration |= (DWORD)DMAC_CHCONFIG_ITC;
// Enable the error interrupt
pDMACRegs->DMACC3Configuration |= (DWORD)DMAC_CHCONFIG_IE;
pHALir_EnableIrq(LOGINTR_DMA); // Enable interrupt.
break;
case DMAC_CHANNEL_4:
// Clear down any outstanding interrupts
pDMACRegs->DMACIntTCClear = DMAC_CHANNEL_4_INT;
pDMACRegs->DMACIntErrClr = DMAC_CHANNEL_4_INT;
// Enable the terminal count interrupt
pDMACRegs->DMACC4Configuration |= (DWORD)DMAC_CHCONFIG_ITC;
// Enable the error interrupt
pDMACRegs->DMACC4Configuration |= (DWORD)DMAC_CHCONFIG_IE;
pHALir_EnableIrq(LOGINTR_DMA); // Enable interrupt.
break;
case DMAC_CHANNEL_5:
// Clear down any outstanding interrupts
pDMACRegs->DMACIntTCClear = DMAC_CHANNEL_5_INT;
pDMACRegs->DMACIntErrClr = DMAC_CHANNEL_5_INT;
// Enable the terminal count interrupt
pDMACRegs->DMACC5Configuration |= (DWORD)DMAC_CHCONFIG_ITC;
// Enable the error interrupt
pDMACRegs->DMACC5Configuration |= (DWORD)DMAC_CHCONFIG_IE;
pHALir_EnableIrq(LOGINTR_DMA); // Enable interrupt.
break;
case DMAC_CHANNEL_6:
// Clear down any outstanding interrupts
pDMACRegs->DMACIntTCClear = DMAC_CHANNEL_6_INT;
pDMACRegs->DMACIntErrClr = DMAC_CHANNEL_6_INT;
// Enable the terminal count interrupt
pDMACRegs->DMACC6Configuration |= (DWORD)DMAC_CHCONFIG_ITC;
// Enable the error interrupt
pDMACRegs->DMACC6Configuration |= (DWORD)DMAC_CHCONFIG_IE;
pHALir_EnableIrq(LOGINTR_DMA); // Enable interrupt.
break;
case DMAC_CHANNEL_7:
// Clear down any outstanding interrupts
pDMACRegs->DMACIntTCClear = DMAC_CHANNEL_7_INT;
pDMACRegs->DMACIntErrClr = DMAC_CHANNEL_7_INT;
// Enable the terminal count interrupt
pDMACRegs->DMACC7Configuration |= (DWORD)DMAC_CHCONFIG_ITC;
// Enable the error interrupt
pDMACRegs->DMACC7Configuration |= (DWORD)DMAC_CHCONFIG_IE;
pHALir_EnableIrq(LOGINTR_DMA); // Enable interrupt.
break;
default:
bRet = FALSE;
break;
}
}
else
{
/* GetActiveDmaChannel failed */
DEBUGMSG(1, (TEXT("OEMInterruptEnable: WARNING GetActiveDmaChannel returned FALSE\r\n")));
}
}
else
{
/* Not a DMA interrupt source so we just directly enable the interrupt
* the case statements are only needed for special cases such as shared
* interrupt lines, otherwise the default case will do.
*/
switch(SysIntr)
{
/* Remember SYSINTR_TIMER0 and SYSINTR_TIMER1 share the same interrupt line
* - however, we only map the SYSINTR_TIMER0 to the relevant LOGINTR hence
* the use of SYSINTR_TIMER0 in the call to pHALir_EnableIrq.
*/
case SYSINTR_TIMER1:
pHALir_EnableTimerInterrupt(TIMER1);
pHALir_EnableIrq(SysIntr2Logic[SYSINTR_TIMER0]); // Enable interrupt.
bRet = TRUE;
break;
case SYSINTR_TIMER0:
pHALir_EnableTimerInterrupt(TIMER0);
pHALir_EnableIrq(SysIntr2Logic[SYSINTR_TIMER0]); // Enable interrupt.
bRet = TRUE;
break;
default:
if (SYSINTR_DEVICES <= SysIntr && SysIntr < SYSINTR_FIRMWARE)
{
// Non-OAL SYSINTRs, no action required
bRet = TRUE;
}
if (Irq != LOGINTR_UNDEFINED)
{
RETAILMSG(0, (TEXT("OEMInterruptEnable IRQ = 0x%x\r\n"),Irq));
pHALir_EnableIrq(Irq);
bRet = TRUE;
}
break;
}
}
return(bRet);
}
/*
* @func BOOL | OEMInterruptDisable | Disable a hardware interrupt
*
* @rdesc none
*
* @parms
* SysIntr Interrupt ID to be disabled.
* See Interrupt ID's.Interrupt ID's> for a list of
* possble values.
*
* @comm OEMInterruptDisable is called by the Kernel when a device driver
* calls <f InterruptDisable>. The system is not preemptible when this
* function is called.
*
* @xref
* Overview.Windows CE Kernel OEM Interface
* InterruptDisable
*/
void OEMInterruptDisable(DWORD SysIntr)
{
DWORD dwDMAchan, Irq;
Irq = OEMTranslateSysIntr(SysIntr);
if( Irq == LOGINTR_DMA )
{
if(GetActiveDmaChannel(&SysIntr, &dwDMAchan))
{
/* This is a dynamically mapped SYSINTR */
DEBUGMSG(1, (TEXT("OEMIntDisable(SYSINTR: %d LOGINT: %d)\r\n"),SysIntr,SysIntr2Logic[SysIntr]));
switch(dwDMAchan)
{
case DMAC_CHANNEL_0:
// Disable the terminal count interrupt
pDMACRegs->DMACC0Configuration &= ~(DWORD)DMAC_CHCONFIG_ITC;
// Disable the error interrupt
pDMACRegs->DMACC0Configuration &= ~(DWORD)DMAC_CHCONFIG_IE;
break;
case DMAC_CHANNEL_1:
// Disable the terminal count interrupt
pDMACRegs->DMACC1Configuration &= ~(DWORD)DMAC_CHCONFIG_ITC;
// Disable the error interrupt
pDMACRegs->DMACC1Configuration &= ~(DWORD)DMAC_CHCONFIG_IE;
break;
case DMAC_CHANNEL_2:
// Disable the terminal count interrupt
pDMACRegs->DMACC2Configuration &= ~(DWORD)DMAC_CHCONFIG_ITC;
// Disable the error interrupt
pDMACRegs->DMACC2Configuration &= ~(DWORD)DMAC_CHCONFIG_IE;
break;
case DMAC_CHANNEL_3:
// Disable the terminal count interrupt
pDMACRegs->DMACC3Configuration &= ~(DWORD)DMAC_CHCONFIG_ITC;
// Disable the error interrupt
pDMACRegs->DMACC3Configuration &= ~(DWORD)DMAC_CHCONFIG_IE;
break;
case DMAC_CHANNEL_4:
// Disable the terminal count interrupt
pDMACRegs->DMACC4Configuration &= ~(DWORD)DMAC_CHCONFIG_ITC;
// Disable the error interrupt
pDMACRegs->DMACC4Configuration &= ~(DWORD)DMAC_CHCONFIG_IE;
break;
case DMAC_CHANNEL_5:
// Disable the terminal count interrupt
pDMACRegs->DMACC5Configuration &= ~(DWORD)DMAC_CHCONFIG_ITC;
// Disable the error interrupt
pDMACRegs->DMACC5Configuration &= ~(DWORD)DMAC_CHCONFIG_IE;
break;
case DMAC_CHANNEL_6:
// Disable the terminal count interrupt
pDMACRegs->DMACC6Configuration &= ~(DWORD)DMAC_CHCONFIG_ITC;
// Disable the error interrupt
pDMACRegs->DMACC6Configuration &= ~(DWORD)DMAC_CHCONFIG_IE;
break;
case DMAC_CHANNEL_7:
// Disable the terminal count interrupt
pDMACRegs->DMACC7Configuration &= ~(DWORD)DMAC_CHCONFIG_ITC;
// Disable the error interrupt
pDMACRegs->DMACC7Configuration &= ~(DWORD)DMAC_CHCONFIG_IE;
break;
}
}
else
{
/* Error condition: Need to investigate! */
DEBUGMSG(1, (TEXT("[ERR]DMAC Not active but SYSINTR mapped\r\n")));
}
}
else
{
switch(SysIntr)
{
/* Remember SYSINTR_TIMER0 and SYSINTR_TIMER1 share the same interrupt line
* - however, we only map the SYSINTR_TIMER0 to the relevant LOGINTR hence
* the use of SYSINTR_TIMER0 in the call to pHALir_DisableIrq.
*/
case SYSINTR_TIMER1:
pHALir_DisableTimerInterrupt(TIMER1);
if (pHALir_TimerInterruptEnabled(TIMER0) && pHALir_TimerInterruptEnabled(TIMER1)) {
pHALir_DisableIrq(SysIntr2Logic[SYSINTR_TIMER0]); // Disable interrupt.
}
break;
case SYSINTR_TIMER0:
pHALir_DisableTimerInterrupt(TIMER0);
if (pHALir_TimerInterruptEnabled(TIMER0) && pHALir_TimerInterruptEnabled(TIMER1)) {
pHALir_DisableIrq(SysIntr2Logic[SYSINTR_TIMER0]); // Disable interrupt.
}
break;
default:
if (Irq != LOGINTR_UNDEFINED)
{
RETAILMSG(0, (TEXT("OEMInterruptDisable IRQ = 0x%x\r\n"),Irq));
pHALir_DisableIrq(Irq);
}
break;
}
}
}
/*
* @func BOOL | OEMInterruptDone | Signal completion of interrupt processing
*
* @rdesc none
*
* @parms
* SysIntr Interrupt ID to be enabled.
* See Interrupt ID's.Interrupt ID's> for a list of
* possble values.
*
* @comm OEMInterruptDone is called by the Kernel when a device driver
* calls InterruptDone(). The system is not preemptible when this
* function is called.
*
* @xref
* Overview.Kernel Interrupt Support
* InterruptDone
*/
void OEMInterruptDone(DWORD SysIntr)
{
// NOTE: we expect the interrupt to be turned off at the device. The
// state isn't latched in any board-level registers.
// Enable interrupt.
OEMInterruptEnable(SysIntr, NULL, 0);
}
#define MEMORY_64MB_ONLY
/*
* OEMGetExtensionDRAM
*
* For systems with memory sockets which may add more ram, here's where
* Windows CE finds out about it.
*/
BOOL OEMGetExtensionDRAM(LPDWORD lpMemStart, LPDWORD lpMemLen)
{
#ifdef MEMORY_64MB_ONLY
// only 64MB available
return FALSE;
#else
// extra 64MB after the first 64MB (128MB available)
*lpMemStart = 0x8C000000;
*lpMemLen = 0x04000000;
return TRUE;
#endif
}
void OEMInitInterrupts(HARP_BOOT_ARGS *pBootArgs)
{
DWORD irq;
pvstVICRegs pVic = (pvstVICRegs)VA_VIC_BASE;
volatile DWORD *VicVectAddress = (DWORD*)(VA_VIC_BASE + VIC_VECTADDR_OFFSET);
volatile DWORD *VicVectCntl = (DWORD*)(VA_VIC_BASE + VIC_CNTLADDR_OFFSET);
/* Clear pending interrupts */
pVic->IntEnClear = 0xFFFFFFFF;
/* Make sure we are not in test mode */
pVic->ITCR = 0;
/* All interrupts to be routed as IRQ's by default */
pVic->IntSelect = 0;
/* Clear any pending soft interrupts */
pVic->SoftIntClear = 0xFFFFFFFF;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -