target.inc

ARM9基于WINDOWSCE的BSP源代码

;
; Copyright (c) Microsoft Corporation.  All rights reserved.
;
;
; Use of this source code is subject to the terms of the Microsoft end-user
; license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
; If you did not accept the terms of the EULA, you are not authorized to use
; this source code. For a copy of the EULA, please see the LICENSE.RTF on your
; install media.
;
;   The content of this file or document is CONFIDENTIAL and PROPRIETARY
;   to Jade Technologies Co., Ltd.  It is subjected to the terms of a
;   License Agreement between Licensee and Jade Technologies Co., Ltd.
;   restricting among other things, the use, reproduction, distribution
;   and transfer.  Each of the embodiments, including this information 
;   and any derivative work shall retain this copyright notice.
; 
;   Copyright (c) 2004 - 2005 Jade Technologies Co., Ltd. 
;   All rights reserved.
; ----------------------------------------------------------------
; File:     target.inc,v
; Revision: 1.0
; ----------------------------------------------------------------
; $
;

      IF :DEF: OPT
        ASSERT  (listopts_s)
old_opt SETA    {OPT}
        OPT     (opt_off)       ; disable listing of include files
      ENDIF

        ; ---------------------------------------------------------------------

        IF :LNOT: :DEF: target_inc
target_inc          EQU     1


        INCLUDE platform.inc
        INCLUDE pl011.inc
        INCLUDE mmumacro.inc
 

        ; ------------------------------------------------------------------
        ; GOTO_ROM
        ; --------
        ; Macro to switch from 0 to high alias of ROM. Some systems cannot 
        ; just switch to High ROM, but must set up the MMU.

        MACRO
        GOTO_ROM        $w1, $w2

        ; Make sure that the switch hasn't already happened 
;        LDR     $w1,=ARMVPB_SYS_MISC
;;        LDR     $w2,[$w1]
;        TST     $w2, #ARMVPB_FPGA_REMAP
;
;        LDREQ   $w1, =PHYS_FLASH_BASE
;        ADDEQ   pc, pc, $w1

        ; NOP to account for pipelining in the add instruction above
        NOP
;
;        LDR     $w1, =ARMVPB_SYS_MISC
;        LDR     $w2, [$w1]
;        ORR     $w2, $w2, #ARMVPB_FPGA_REMAP
;        STR     $w2, [$w1]

        MEND

        ; ---------------------------------------------------------------------

        MACRO
$label  DISABLE_INTS    $w1, $w2

        ;
        ; Explicitly disable the standard (non-debug) UARTs from interrupting
        ; This code relies on the fact that all the UART registers are
        ; mapped into seperate dwords.
        ;

        LDR     $w1, =PHYS_UART0_BASE
        LDR     $w2, =0                 ; disable UART
        STRB    $w2, [$w1, #PL011_CR]

        LDR     $w1, =PHYS_UART1_BASE
        LDR     $w2, =0                 ; disable UART
        STRB    $w2, [$w1, #PL011_CR]
    
        MEND

        ; ---------------------------------------------------------------------

        ENDIF    ; target_inc

 IF :DEF: OPT
        OPT     (old_opt)       ; restore previous listing options
 ENDIF

        ; ---------------------------------------------------------------------
        END

; EOF target.s