mpmcinit.inc

ARM9基于WINDOWSCE的BSP源代码

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;   to Jade Technologies Co., Ltd.  It is subjected to the terms of a
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;   restricting among other things, the use, reproduction, distribution
;   and transfer.  Each of the embodiments, including this information 
;   and any derivative work shall retain this copyright notice.
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;   Copyright (c) 2004 - 2005 Jade Technologies Co., Ltd. 
;   All rights reserved.



; Mpmc Dynamic Memory Config
; --------------------------

MPMC_Base               EQU 0x2000D000
MPMC_Base_Plus_256      EQU 0x2000D100
MPMC_Base_Plus_1024     EQU 0x2000D400
MPMC_Base_Plus_1152     EQU 0x2000D480

MPMCControl             EQU 0x2000D000
MPMCStatus              EQU 0x2000D004
MPMCConfig              EQU 0x2000D008
MPMCDynamicControl      EQU 0x2000D020
MPMCDynamicRefresh      EQU 0x2000D024
MPMCDynamicReadConfig   EQU 0x2000D028
MPMCDynamictRP          EQU 0x2000D030
MPMCDynamictRAS         EQU 0x2000D034
MPMCDynamictSREX        EQU 0x2000D038
MPMCDynamictWR          EQU 0x2000D044
MPMCDynamictRC          EQU 0x2000D048
MPMCDynamictRFC         EQU 0x2000D04c
MPMCDynamictXSR         EQU 0x2000D050
MPMCDynamictRRD         EQU 0x2000D054
MPMCDynamictMRD         EQU 0x2000D058
MPMCDynamictCDLR        EQU 0x2000D05c
MPMCDynamicConfig0      EQU 0x2000D100
MPMCDynamicRasCas0      EQU 0x2000D104
MPMCDynamicConfig1      EQU 0x2000D120
MPMCDynamicRasCas1      EQU 0x2000D124
MPMCAHBTimeout0         EQU 0x2000D408
MPMCAHBTimeout1         EQU 0x2000D428
MPMCAHBTimeout2         EQU 0x2000D448  
MPMCAHBTimeout3         EQU 0x2000D468
MPMCAHBTimeout4         EQU 0x2000D488
MPMCAHBTimeout5         EQU 0x2000D4a8
MPMCAHBTimeout6         EQU 0x2000D4c8
MPMCAHBTimeout7         EQU 0x2000D4e8


; Define constants
; ----------------

ModeRegAddr             EQU 0x40000       ; Define Mode Register address, used when reading from rams

SDRAMBank4BaseAddr      EQU 0x00000000                          ; Define SDRAM Bank 4 base addr
SDRAMBank4BaseAddrMod   EQU 0x04000000                          ; Define SDRAM Bank 4 base addr
SDRAM4ModeRegAddr       EQU SDRAMBank4BaseAddrMod + ModeRegAddr ; Define SDRAM Bank 4 mode register addr

SDRAMBank5BaseAddr      EQU 0x08000000                          ; Define SDRAM Bank 5 base addr
SDRAM5ModeRegAddr       EQU SDRAMBank5BaseAddr + ModeRegAddr    ; Define SDRAM Bank 5 mode register addr

	END