flushdc.s

ARM9基于WINDOWSCE的BSP源代码

;
; Copyright (c) Microsoft Corporation.  All rights reserved.
;
;
; Use of this source code is subject to the terms of the Microsoft end-user
; license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
; If you did not accept the terms of the EULA, you are not authorized to use
; this source code. For a copy of the EULA, please see the LICENSE.RTF on your
; install media.
;
; Copyright (c) 1998, 1999 ARM Limited
; All Rights Reserved
;

    OPT     2       ; disable listing
    INCLUDE kxarm.h
    OPT     1       ; reenable listing
    OPT     128     ; disable listing of macro expansions
    INCLUDE armmacros.s

    TEXTAREA

    LEAF_ENTRY      ARMFlushDCache
;++
; Routine Description:
;    Clean and invalidate the Data Cache
;
; The following code is called to flush the dcache. It
; does a clean and invalidate on each cache line using the index and
; segment.
;
; Syntax:
;       void ARMFlushDCache(
;           DWORD dwLinesPerSetZeroRel,
;           DWORD dwSetsZeroRel,
;           DWORD dwSetIndexBit,
;           DWORD dwLineSize)
;
; Arguments:
;       dwLinesPerSetZeroRel - 0 relative number of cache lines per set
;       dwSetsZeroRel - 0 relative number of cache sets
;       dwSetIndexBit - 32 - Log2(dwLinesPerSet)
;       dwLineSize - cache line size, in bytes
;
; Return Value:
;       -- none --
; r0..r3,r12 junk
; CC flags junk
;--

    ; save registers
    stmfd   sp!, {r4}
    mov     r4, r1                          ; save the number of sets

clean_indexloop
    mov     r12, r0, lsl r2                 ; index goes in the top 6 bits
    mov     r1, r4                          ; reload number of sets
    
clean_setloop
    ; write back and invalidate the line
    mcr     p15, 0, r12, c7, c14, 2

    ; add the set index
    add     r12, r12, r3

    ; decrement the set number
    subs    r1, r1, #1
    bpl     clean_setloop

    ; decrement the index number
    subs    r0, r0, #1
    bpl     clean_indexloop

    ; drain the write buffer
    mov     r0, #0
    mcr     p15, 0, r0, c7, c10, 4
    
    ; restore registers
    ldmfd   sp!, {r4}

    RETURN

    END