📄 vportcap.c
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return retVal;
}
/*
* ======== _captureEdmaISR ========
* EDMA ISR
*/
static void captureEdmaISR(Int tcc)
{
Int i, j;
FVID_Frame *viop, *curViop;
/* find out the source of the edma interrupt */
for(j = 0; j < _VP_PORT_CNT; j ++) {
for(i = 0; i < _VPORT_CHAN_CNT; i ++ ){ /* loop through two channels */
_VPORT_ChanObj* chan = &portObjs[j].chanObj[i];
if((chan->status & _VPORT_READY)
&& (tcc == chan->tcc[0])){
/* make sure all transfers are completed */
// while(! EDMA_intTest(chan->tcc[1])){};
// MH4
// EDMA_intClear(chan->tcc[1]);
// while(! EDMA_intTest(chan->tcc[2])){};
// MH4
// EDMA_intClear(chan->tcc[2]);
if(chan->mergeFlds){
/* 1st field is being captured, update */
/* the rld to point to the 2nd field */
/* of the current frame, which is the nextViop */
EDMA_RSETH(chan->hEdma[0], DST,
chan->nextViop->frame.iFrm.y1);
// MH4
//EDMA_RSETH(chan->hEdma[1], DST,
// chan->nextViop->frame.iFrm.cb1);
//EDMA_RSETH(chan->hEdma[2], DST,
// chan->nextViop->frame.iFrm.cr1);
EDMA_RSETH(chan->hRld[0], DST,
chan->nextViop->frame.iFrm.y1);
// MH4
//EDMA_RSETH(chan->hRld[2], DST,
// chan->nextViop->frame.iFrm.cb1);
//EDMA_RSETH(chan->hRld[4], DST,
// chan->nextViop->frame.iFrm.cr1);
EDMA_RSETH(chan->hRld[1], DST,
chan->nextViop->frame.iFrm.y2);
// MH4
//EDMA_RSETH(chan->hRld[3], DST,
// chan->nextViop->frame.iFrm.cb2);
//EDMA_RSETH(chan->hRld[5], DST,
// chan->nextViop->frame.iFrm.cr2);
}
/* update the current viop */
curViop = chan->curViop;
chan->curViop = chan->nextViop;
/* update the most recent viop */
if(curViop != chan->mrViop && chan->mrViop != INV) {
QUE_enqueue(&chan->qIn, chan->mrViop);
}
chan->mrViop = curViop;
if((viop = (FVID_Frame *)QUE_dequeue(&chan->qIn))
!=(FVID_Frame *)&chan->qIn) {
/* queue IS not empty */
chan->nextViop = viop;
}else {
if(chan->packetIOM == INV) {
/* in queue is empty, but no request is pending */
/* recycle the current VIOP back */
/* but still set it as the most recent VIOP */
chan->nextViop = curViop;
}
chan->queEmpty = TRUE;
}
if(! chan->mergeFlds){
EDMA_RSETH(chan->hEdma[0], DST,
chan->curViop->frame.iFrm.y1);
// MH4
//EDMA_RSETH(chan->hEdma[1], DST,
// chan->curViop->frame.iFrm.cb1);
//EDMA_RSETH(chan->hEdma[2], DST,
// chan->curViop->frame.iFrm.cr1);
EDMA_RSETH(chan->hRld[0], DST,
chan->nextViop->frame.iFrm.y1);
// MH4
//EDMA_RSETH(chan->hRld[1], DST,
// chan->nextViop->frame.iFrm.cb1);
//EDMA_RSETH(chan->hRld[2], DST,
// chan->nextViop->frame.iFrm.cr1);
}
/* call the channel's callback function */
if(curViop != chan->curViop) {
if(chan->packetIOM != INV) {
/* call the channel's callback function */
*(void **)chan->packetIOM->addr = curViop;
chan->packetIOM->size = sizeof(FVID_Frame);
chan->cbFxn((Ptr)chan->cbArg, chan->packetIOM);
chan->packetIOM = INV;
chan->mrViop = INV;
}else if(chan->queEmpty){
chan->nextViop = chan->mrViop;
}
}else {
chan->mrViop = INV;
}
}
}
}
}
/*
* ======== _configCh ========
* configure video port channel settings
*/
static Int _configCh(
Ptr chanp,
VPORTCAP_Params *params
)
{
_VPORT_ChanObj* chan= (_VPORT_ChanObj *)chanp;
volatile Int vpCtl, vcCtl, fld1Strt, fld2Strt, fld1Stop, fld2Stop;
volatile Int* base = (volatile Int *)chan->base;
Int retVal = IOM_COMPLETED;
Int numPixels, numLines, numCPixels;
if(chan->status & _VPORT_OPENED) {
/* configure channel A capture settings */
vcCtl = VP_VCACTL_RMK(0,1,0,params->fldInv,
params->extCtl, params->fldDect, params->vCtRst,
params->hCtRst, 0, params->bpk10Bit, 0, 0,
params->resmpl,params->scale,1,
((params->fldOp & 4) >> 2),
((params->fldOp & 2) >> 1),
(params->fldOp & 1),
params->cmode);
fld1Strt = params->fldXStrt1 + (params->fldYStrt1 << 16);
fld1Stop = params->fldXStop1 + (params->fldYStop1 << 16);
fld2Strt = params->fldXStrt2 + (params->fldYStrt2 << 16);
fld2Stop = params->fldXStop2 + (params->fldYStop2 << 16);
if(params->fldOp == VPORT_FLDOP_FRAME) {
assert(params->fldXStop1 == params->fldXStop2);
assert(params->fldXStrt1 == params->fldXStrt2);
}
base[_VP_VCACTL_OFFSETA] = vcCtl;
base[_VP_VCASTRT1_OFFSETA] = fld1Strt;
base[_VP_VCASTOP1_OFFSETA] = fld1Stop;
base[_VP_VCASTRT2_OFFSETA] = fld2Strt;
base[_VP_VCASTOP2_OFFSETA] = fld2Stop;
numPixels = params->fldXStop1 - params->fldXStrt1 + 1;/* line size */
numLines = 0;
if(params->fldOp != VPORT_FLDOP_FLD2){
numLines += params->fldYStop1 - params->fldYStrt1 + 1;
}
chan->numLinesFld1 = numLines;
if(params->fldOp == VPORT_FLDOP_FLD2
|| params->fldOp == VPORT_FLDOP_FRAME){
numLines += params->fldYStop2 - params->fldYStrt2 + 1;
}
chan->resmpl = params->resmpl;
chan->scale = params->scale;
chan->numLines = numLines;
numPixels >>= params->scale;
numCPixels = numPixels >> 1;
/* set both field1 and field2 threshold to the line size */
chan->numPixels = numPixels;
if(params->cmode & _VPORT_MASK_10BIT){
/* 10-bit BT.656 or 20-bit Y/C mode */
if( params->bpk10Bit == VPORTCAP_BPK_10BIT_ZERO_EXTENDED
|| params->bpk10Bit == VPORTCAP_BPK_10BIT_SIGN_EXTENDED){
chan->yPitch = (numPixels * 2 + 7) & (~ 7);
// MH4
chan->cPitch = 0;
//chan->cPitch = (numCPixels * 2 + 7) & (~ 7);
}else {
chan->yPitch = (numPixels * 4 / 3 + 7) & (~ 7);
// MH4
chan->cPitch = 0;
//chan->cPitch = (numCPixels* 4 / 3 + 7) & (~ 7);
}
} else {/* 8-bit BT.656 or 16-bit Y/C mode */
chan->yPitch = (numPixels + 7) & (~ 7);
// MH4
chan->cPitch = 0;
//chan->cPitch = (numCPixels + 7) & (~ 7);
}
chan->yThrld = params->thrld;
if(params->mergeFlds && params->fldOp == VPORT_FLDOP_FRAME) {
/* merge field comments */
/* frame capture and merge 2 fields into one frame */
/* set threshold is same as line size */
chan->yThrld = chan->yPitch >> 3;
chan->numEventsFld1 = chan->numLinesFld1;
chan->numEvents = chan->numLines;
chan->mergeFlds = TRUE;
}else {
assert(((chan->yPitch*chan->numLinesFld1) / (chan->yThrld << 3))
*(chan->yThrld << 3) == (chan->yPitch * chan->numLinesFld1));
assert(((chan->yPitch * chan->numLines) / (chan->yThrld << 3))
*(chan->yThrld << 3) == (chan->yPitch * chan->numLines));
chan->numEventsFld1 =
chan->yPitch * chan->numLinesFld1 / (chan->yThrld << 3);
chan->numEvents =
chan->yPitch * chan->numLines / (chan->yThrld << 3);
chan->mergeFlds = FALSE;
}
// MH4
//chan->cThrld = (chan->yThrld + 1) >> 1;
base[_VP_VCATHRLD_OFFSETA] = VP_VCATHRLD_RMK(chan->yThrld,chan->yThrld);
base[_VP_VCAEVTCT_OFFSETA] = VP_VCAEVTCT_RMK(
(chan->numEvents-chan->numEventsFld1), chan->numEventsFld1 );
chan->status|=_VPORT_CFGED;
retVal = IOM_COMPLETED;
}
return retVal;
}
/*
* ======== _configChan ========
* configure channel settings
*/
static Int _configChan(Ptr chanp, Ptr args)
{
VPORTCAP_Params* params = (VPORTCAP_Params*)args;
/* configure video port channel A/B control register */
_configCh(chanp, params);
/* configure EDMA and frame buffer */
_configTransfer(chanp, params);
return IOM_COMPLETED;
}
/*
* ======== _configPort ========
* configure port level registers
*/
static Int _configPort(Ptr chanp, Ptr args)
{
PortObj* port = (PortObj *)chanp;
volatile Int *base = (volatile Int *)port->base;
/* configure video port control register */
VPORT_PortParams* portParams = (VPORT_PortParams*)args;
/* enable video port */
base[_VP_PCR_OFFSET] |= VP_PCR_PEREN_ENABLE << _VP_PCR_PEREN_SHIFT;
/* reset video port */
base[_VP_VPCTL_OFFSET] |=
VP_VPCTL_VPRST_RESET << _VP_VPCTL_VPRST_SHIFT;
base[_VP_VPCTL_OFFSET] = VP_VPCTL_RMK(0,0,0,portParams->vc3Polarity,
portParams->vc2Polarity,portParams->vc1Polarity,0,0,
portParams->dualChanEnable);
/* enable video port */
base[_VP_VPCTL_OFFSET] |= (VP_VPCTL_VPHLT_CLEAR << _VP_VPCTL_VPHLT_SHIFT);
port->chanObj[0].edcFxns = portParams->edcTbl[0];
port->chanObj[1].edcFxns = portParams->edcTbl[1];
IRQ_clear(IRQ_EVT_EDMAINT);
return IOM_COMPLETED;
}
/*
* ======== _configTransfer ========
* configure channel EDMA settings
*/
static Int _configTransfer(
Ptr chanp,
VPORTCAP_Params *params
)
{
_VPORT_ChanObj* chan = (_VPORT_ChanObj *)chanp;
Int i;
EDMA_Config cfgEdma;
Int thrld;
Int8* curAddr;
if(chan->status & _VPORT_CFGED) {
assert(params->numFrmBufs >= 2 && params->numFrmBufs
<= VPORT_MAX_NUM_FRMBUFS);
QUE_new(&chan->qIn);
chan->queEmpty = FALSE;
chan->mrViop = INV;
chan->packetIOM = INV;
chan->segId = params->segId;
EDMA_intDisable(chan->tcc[0]);
if(chan->numFrms == 0) {
chan->numFrms = params->numFrmBufs;
/* allocate frame buffer */
// Check This MH4
chan->bufSz = chan->yPitch * chan->numLines
+ chan->cPitch * chan->numLines * 2;
for(i = 0; i < chan->numFrms; i ++) {
if((curAddr = MEM_alloc(params->segId,chan->bufSz,
params->alignment)) == MEM_ILLEGAL){
return IOM_EALLOC;
}
/* field 1 */
chan->viops[i].frame.iFrm.y1 = curAddr;
curAddr += chan->numLines*chan->yPitch;
/* // MH4
chan->viops[i].frame.iFrm.cb1 = curAddr;
curAddr += chan->numLines*chan->cPitch;
chan->viops[i].frame.iFrm.cr1 = curAddr;
curAddr += chan->numLines*chan->cPitch;
*/
/* field 2 */
if(params->fldOp == VPORT_FLDOP_FLD2) {
chan->viops[i].frame.iFrm.y2 =
chan->viops[i].frame.iFrm.y1;
/* //MH4
chan->viops[i].frame.iFrm.cb2 =
chan->viops[i].frame.iFrm.cb1;
chan->viops[i].frame.iFrm.cr2 =
chan->viops[i].frame.iFrm.cr1;
*/
}
else if(! chan->mergeFlds) {
chan->viops[i].frame.iFrm.y2 =
chan->viops[i].frame.iFrm.y1
+ chan->numLinesFld1*chan->yPitch;
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