d4_16.xml

来自「此文件是对xilinx95144器件编的程序」· XML 代码 · 共 4 行 · 第 1/2 页

<document><ascFile>d4_16.rpt</ascFile><devFile>C:/Xilinx/xc9500/data/xc95144.chp</devFile><mfdFile>d4_16.mfd</mfdFile><htmlFile logo="xc9500_logo.jpg" pin_legend="pinlegend.htm" logic_legend="logiclegend.htm"/><header pkg="PQ100" date=" 8-11-2004" time=" 10:34AM" speed="-7" design="d4_16" device="XC95144" status="1" eqnType="1" version="1.0" statusStr="Successful" swVersion="F.31"/><inputs id="cs"/><inputs id="reset"/><inputs id="din3_SPECSIG"/><inputs id="din2_SPECSIG"/><inputs id="din1_SPECSIG"/><inputs id="din0_SPECSIG"/><pin id="FB1_MC2_PIN13" use="O" pinnum="13" signal="cs_out2_SPECSIG"/><pin id="FB1_MC3_PIN14" pinnum="14"/><pin id="FB1_MC5_PIN15" pinnum="15"/><pin id="FB1_MC6_PIN16" use="O" pinnum="16" signal="cs_out3_SPECSIG"/><pin id="FB1_MC8_PIN17" pinnum="17"/><pin id="FB1_MC9_PIN18" pinnum="18"/><pin id="FB1_MC11_PIN19" use="O" pinnum="19" signal="cs_out4_SPECSIG"/><pin id="FB1_MC12_PIN20" pinnum="20"/><pin id="FB1_MC14_PIN21" pinnum="21"/><pin id="FB1_MC15_PIN22" pinnum="22"/><pin id="FB1_MC17_PIN24" pinnum="24"/><pin id="FB2_MC2_PIN1" pinnum="1"/><pin id="FB2_MC5_PIN3" pinnum="3"/><pin id="FB2_MC6_PIN4" pinnum="4"/><pin id="FB2_MC8_PIN5" pinnum="5"/><pin id="FB2_MC9_PIN6" pinnum="6"/><pin id="FB2_MC11_PIN8" use="O" pinnum="8" signal="cs_out8_SPECSIG"/><pin id="FB2_MC12_PIN9" pinnum="9"/><pin id="FB2_MC14_PIN10" pinnum="10"/><pin id="FB2_MC15_PIN11" use="O" pinnum="11" signal="cs_out9_SPECSIG"/><pin id="FB2_MC17_PIN12" pinnum="12"/><pin id="FB3_MC2_PIN25" pinnum="25"/><pin id="FB3_MC5_PIN26" use="O" pinnum="26" signal="cs_out0_SPECSIG"/><pin id="FB3_MC6_PIN27" pinnum="27"/><pin id="FB3_MC8_PIN29" pinnum="29"/><pin id="FB3_MC9_PIN30" pinnum="30"/><pin id="FB3_MC11_PIN31" use="I" pinnum="31" signal="din1_SPECSIG"/><pin id="FB3_MC12_PIN32" use="O" pinnum="32" signal="cs_out5_SPECSIG"/><pin id="FB3_MC14_PIN34" use="I" pinnum="34" signal="din3_SPECSIG"/><pin id="FB3_MC15_PIN35" pinnum="35"/><pin id="FB3_MC17_PIN36" pinnum="36"/><pin id="FB4_MC2_PIN89" use="O" pinnum="89" signal="cs_out10_SPECSIG"/><pin id="FB4_MC5_PIN91" pinnum="91"/><pin id="FB4_MC6_PIN92" pinnum="92"/><pin id="FB4_MC8_PIN93" pinnum="93"/><pin id="FB4_MC9_PIN94" pinnum="94"/><pin id="FB4_MC11_PIN95" use="O" pinnum="95" signal="cs_out15_SPECSIG"/><pin id="FB4_MC12_PIN96" pinnum="96"/><pin id="FB4_MC14_PIN97" use="I" pinnum="97" signal="din2_SPECSIG"/><pin id="FB4_MC15_PIN98" pinnum="98"/><pin id="FB4_MC17_PIN99" use="I" pinnum="99" signal="cs"/><pin id="FB5_MC2_PIN37" use="O" pinnum="37" signal="cs_out11_SPECSIG"/><pin id="FB5_MC5_PIN38" pinnum="38"/><pin id="FB5_MC6_PIN39" pinnum="39"/><pin id="FB5_MC8_PIN41" pinnum="41"/><pin id="FB5_MC9_PIN42" pinnum="42"/><pin id="FB5_MC11_PIN43" use="O" pinnum="43" signal="cs_out6_SPECSIG"/><pin id="FB5_MC12_PIN44" pinnum="44"/><pin id="FB5_MC14_PIN45" pinnum="45"/><pin id="FB5_MC15_PIN48" pinnum="48"/><pin id="FB5_MC17_PIN51" pinnum="51"/><pin id="FB6_MC2_PIN76" use="O" pinnum="76" signal="cs_out12_SPECSIG"/><pin id="FB6_MC5_PIN78" pinnum="78"/><pin id="FB6_MC6_PIN79" pinnum="79"/><pin id="FB6_MC8_PIN80" pinnum="80"/><pin id="FB6_MC9_PIN81" pinnum="81"/><pin id="FB6_MC11_PIN82" use="O" pinnum="82" signal="cs_out1_SPECSIG"/><pin id="FB6_MC12_PIN83" pinnum="83"/><pin id="FB6_MC14_PIN84" pinnum="84"/><pin id="FB6_MC15_PIN87" pinnum="87"/><pin id="FB6_MC17_PIN88" pinnum="88"/><pin id="FB7_MC2_PIN52" use="O" pinnum="52" signal="cs_out13_SPECSIG"/><pin id="FB7_MC5_PIN54" pinnum="54"/><pin id="FB7_MC6_PIN55" pinnum="55"/><pin id="FB7_MC8_PIN56" pinnum="56"/><pin id="FB7_MC9_PIN57" pinnum="57"/><pin id="FB7_MC11_PIN58" use="O" pinnum="58" signal="cs_out7_SPECSIG"/><pin id="FB7_MC12_PIN60" pinnum="60"/><pin id="FB7_MC14_PIN61" pinnum="61"/><pin id="FB7_MC15_PIN62" pinnum="62"/><pin id="FB7_MC17_PIN63" pinnum="63"/><pin id="FB8_MC2_PIN65" use="O" pinnum="65" signal="cs_out14_SPECSIG"/><pin id="FB8_MC5_PIN66" use="I" pinnum="66" signal="reset"/><pin id="FB8_MC6_PIN67" pinnum="67"/><pin id="FB8_MC8_PIN68" pinnum="68"/><pin id="FB8_MC9_PIN69" pinnum="69"/><pin id="FB8_MC11_PIN70" use="I" pinnum="70" signal="din0_SPECSIG"/><pin id="FB8_MC12_PIN72" pinnum="72"/><pin id="FB8_MC14_PIN73" pinnum="73"/><pin id="FB8_MC15_PIN74" pinnum="74"/><pin id="FB8_MC17_PIN75" pinnum="75"/><fblock id="FB1" pinUse="3" inputUse="6"><macrocell id="FB1_MC1"/><macrocell id="FB1_MC2" pin="FB1_MC2_PIN13" sigUse="6" signal="cs_out2_SPECSIG"><pterms pt1="FB1_2_1"/></macrocell><macrocell id="FB1_MC3" pin="FB1_MC3_PIN14"/><macrocell id="FB1_MC4"/><macrocell id="FB1_MC5" pin="FB1_MC5_PIN15"/><macrocell id="FB1_MC6" pin="FB1_MC6_PIN16" sigUse="6" signal="cs_out3_SPECSIG"><pterms pt1="FB1_6_1"/></macrocell><macrocell id="FB1_MC7"/><macrocell id="FB1_MC8" pin="FB1_MC8_PIN17"/><macrocell id="FB1_MC9" pin="FB1_MC9_PIN18"/><macrocell id="FB1_MC10"/><macrocell id="FB1_MC11" pin="FB1_MC11_PIN19" sigUse="6" signal="cs_out4_SPECSIG"><pterms pt1="FB1_11_1"/></macrocell><macrocell id="FB1_MC12" pin="FB1_MC12_PIN20"/><macrocell id="FB1_MC13"/><macrocell id="FB1_MC14" pin="FB1_MC14_PIN21"/><macrocell id="FB1_MC15" pin="FB1_MC15_PIN22"/><macrocell id="FB1_MC16"/><macrocell id="FB1_MC17" pin="FB1_MC17_PIN24"/><macrocell id="FB1_MC18"/><fbinput id="FB1_I1" signal="cs"/><fbinput id="FB1_I2" signal="din0_SPECSIG"/><fbinput id="FB1_I3" signal="din1_SPECSIG"/><fbinput id="FB1_I4" signal="din2_SPECSIG"/><fbinput id="FB1_I5" signal="din3_SPECSIG"/><fbinput id="FB1_I6" signal="reset"/><pterm id="FB1_2_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG" negated="ON"/><signal id="din2_SPECSIG" negated="ON"/><signal id="din1_SPECSIG"/><signal id="din0_SPECSIG" negated="ON"/></pterm><pterm id="FB1_6_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG" negated="ON"/><signal id="din2_SPECSIG" negated="ON"/><signal id="din1_SPECSIG"/><signal id="din0_SPECSIG"/></pterm><pterm id="FB1_11_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG" negated="ON"/><signal id="din2_SPECSIG"/><signal id="din1_SPECSIG" negated="ON"/><signal id="din0_SPECSIG" negated="ON"/></pterm><equation id="cs_out2_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB1_2_1"/></d2></equation><equation id="cs_out3_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB1_6_1"/></d2></equation><equation id="cs_out4_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB1_11_1"/></d2></equation></fblock><fblock id="FB2" pinUse="2" inputUse="6"><macrocell id="FB2_MC1"/><macrocell id="FB2_MC2" pin="FB2_MC2_PIN1"/><macrocell id="FB2_MC3"/><macrocell id="FB2_MC4"/><macrocell id="FB2_MC5" pin="FB2_MC5_PIN3"/><macrocell id="FB2_MC6" pin="FB2_MC6_PIN4"/><macrocell id="FB2_MC7"/><macrocell id="FB2_MC8" pin="FB2_MC8_PIN5"/><macrocell id="FB2_MC9" pin="FB2_MC9_PIN6"/><macrocell id="FB2_MC10"/><macrocell id="FB2_MC11" pin="FB2_MC11_PIN8" sigUse="6" signal="cs_out8_SPECSIG"><pterms pt1="FB2_11_1"/></macrocell><macrocell id="FB2_MC12" pin="FB2_MC12_PIN9"/><macrocell id="FB2_MC13"/><macrocell id="FB2_MC14" pin="FB2_MC14_PIN10"/><macrocell id="FB2_MC15" pin="FB2_MC15_PIN11" sigUse="6" signal="cs_out9_SPECSIG"><pterms pt1="FB2_15_1"/></macrocell><macrocell id="FB2_MC16"/><macrocell id="FB2_MC17" pin="FB2_MC17_PIN12"/><macrocell id="FB2_MC18"/><fbinput id="FB2_I1" signal="cs"/><fbinput id="FB2_I2" signal="din0_SPECSIG"/><fbinput id="FB2_I3" signal="din1_SPECSIG"/><fbinput id="FB2_I4" signal="din2_SPECSIG"/><fbinput id="FB2_I5" signal="din3_SPECSIG"/><fbinput id="FB2_I6" signal="reset"/><pterm id="FB2_11_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG"/><signal id="din2_SPECSIG" negated="ON"/><signal id="din1_SPECSIG" negated="ON"/><signal id="din0_SPECSIG" negated="ON"/></pterm><pterm id="FB2_15_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG"/><signal id="din2_SPECSIG" negated="ON"/><signal id="din1_SPECSIG" negated="ON"/><signal id="din0_SPECSIG"/></pterm><equation id="cs_out8_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB2_11_1"/></d2></equation><equation id="cs_out9_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB2_15_1"/></d2></equation></fblock><fblock id="FB3" pinUse="4" inputUse="6"><macrocell id="FB3_MC1"/><macrocell id="FB3_MC2" pin="FB3_MC2_PIN25"/><macrocell id="FB3_MC3"/><macrocell id="FB3_MC4"/><macrocell id="FB3_MC5" pin="FB3_MC5_PIN26" sigUse="6" signal="cs_out0_SPECSIG"><pterms pt1="FB3_5_1"/></macrocell><macrocell id="FB3_MC6" pin="FB3_MC6_PIN27"/><macrocell id="FB3_MC7"/><macrocell id="FB3_MC8" pin="FB3_MC8_PIN29"/><macrocell id="FB3_MC9" pin="FB3_MC9_PIN30"/><macrocell id="FB3_MC10"/><macrocell id="FB3_MC11" pin="FB3_MC11_PIN31"/><macrocell id="FB3_MC12" pin="FB3_MC12_PIN32" sigUse="6" signal="cs_out5_SPECSIG"><pterms pt1="FB3_12_1"/></macrocell><macrocell id="FB3_MC13"/><macrocell id="FB3_MC14" pin="FB3_MC14_PIN34"/><macrocell id="FB3_MC15" pin="FB3_MC15_PIN35"/><macrocell id="FB3_MC16"/><macrocell id="FB3_MC17" pin="FB3_MC17_PIN36"/><macrocell id="FB3_MC18"/><fbinput id="FB3_I1" signal="cs"/><fbinput id="FB3_I2" signal="din0_SPECSIG"/><fbinput id="FB3_I3" signal="din1_SPECSIG"/><fbinput id="FB3_I4" signal="din2_SPECSIG"/><fbinput id="FB3_I5" signal="din3_SPECSIG"/><fbinput id="FB3_I6" signal="reset"/><pterm id="FB3_5_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG" negated="ON"/><signal id="din2_SPECSIG" negated="ON"/><signal id="din1_SPECSIG" negated="ON"/><signal id="din0_SPECSIG" negated="ON"/></pterm><pterm id="FB3_12_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG" negated="ON"/><signal id="din2_SPECSIG"/><signal id="din1_SPECSIG" negated="ON"/><signal id="din0_SPECSIG"/></pterm><equation id="cs_out0_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB3_5_1"/></d2></equation><equation id="cs_out5_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB3_12_1"/></d2></equation></fblock><fblock id="FB4" pinUse="4" inputUse="6"><macrocell id="FB4_MC1"/><macrocell id="FB4_MC2" pin="FB4_MC2_PIN89" sigUse="6" signal="cs_out10_SPECSIG"><pterms pt1="FB4_2_1"/></macrocell><macrocell id="FB4_MC3"/><macrocell id="FB4_MC4"/><macrocell id="FB4_MC5" pin="FB4_MC5_PIN91"/><macrocell id="FB4_MC6" pin="FB4_MC6_PIN92"/><macrocell id="FB4_MC7"/><macrocell id="FB4_MC8" pin="FB4_MC8_PIN93"/><macrocell id="FB4_MC9" pin="FB4_MC9_PIN94"/><macrocell id="FB4_MC10"/><macrocell id="FB4_MC11" pin="FB4_MC11_PIN95" sigUse="6" signal="cs_out15_SPECSIG"><pterms pt1="FB4_11_1"/></macrocell><macrocell id="FB4_MC12" pin="FB4_MC12_PIN96"/><macrocell id="FB4_MC13"/><macrocell id="FB4_MC14" pin="FB4_MC14_PIN97"/><macrocell id="FB4_MC15" pin="FB4_MC15_PIN98"/><macrocell id="FB4_MC16"/><macrocell id="FB4_MC17" pin="FB4_MC17_PIN99"/><macrocell id="FB4_MC18"/><fbinput id="FB4_I1" signal="cs"/><fbinput id="FB4_I2" signal="din0_SPECSIG"/><fbinput id="FB4_I3" signal="din1_SPECSIG"/><fbinput id="FB4_I4" signal="din2_SPECSIG"/><fbinput id="FB4_I5" signal="din3_SPECSIG"/><fbinput id="FB4_I6" signal="reset"/><pterm id="FB4_2_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG"/><signal id="din2_SPECSIG" negated="ON"/><signal id="din1_SPECSIG"/><signal id="din0_SPECSIG" negated="ON"/></pterm><pterm id="FB4_11_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG"/><signal id="din2_SPECSIG"/><signal id="din1_SPECSIG"/><signal id="din0_SPECSIG"/></pterm><equation id="cs_out10_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB4_2_1"/></d2></equation><equation id="cs_out15_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB4_11_1"/></d2></equation></fblock><fblock id="FB5" pinUse="2" inputUse="6"><macrocell id="FB5_MC1"/><macrocell id="FB5_MC2" pin="FB5_MC2_PIN37" sigUse="6" signal="cs_out11_SPECSIG"><pterms pt1="FB5_2_1"/></macrocell><macrocell id="FB5_MC3"/><macrocell id="FB5_MC4"/><macrocell id="FB5_MC5" pin="FB5_MC5_PIN38"/><macrocell id="FB5_MC6" pin="FB5_MC6_PIN39"/><macrocell id="FB5_MC7"/><macrocell id="FB5_MC8" pin="FB5_MC8_PIN41"/><macrocell id="FB5_MC9" pin="FB5_MC9_PIN42"/><macrocell id="FB5_MC10"/><macrocell id="FB5_MC11" pin="FB5_MC11_PIN43" sigUse="6" signal="cs_out6_SPECSIG"><pterms pt1="FB5_11_1"/></macrocell><macrocell id="FB5_MC12" pin="FB5_MC12_PIN44"/><macrocell id="FB5_MC13"/><macrocell id="FB5_MC14" pin="FB5_MC14_PIN45"/><macrocell id="FB5_MC15" pin="FB5_MC15_PIN48"/><macrocell id="FB5_MC16"/><macrocell id="FB5_MC17" pin="FB5_MC17_PIN51"/><macrocell id="FB5_MC18"/><fbinput id="FB5_I1" signal="cs"/><fbinput id="FB5_I2" signal="din0_SPECSIG"/><fbinput id="FB5_I3" signal="din1_SPECSIG"/><fbinput id="FB5_I4" signal="din2_SPECSIG"/><fbinput id="FB5_I5" signal="din3_SPECSIG"/><fbinput id="FB5_I6" signal="reset"/><pterm id="FB5_2_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG"/><signal id="din2_SPECSIG" negated="ON"/><signal id="din1_SPECSIG"/><signal id="din0_SPECSIG"/></pterm><pterm id="FB5_11_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG" negated="ON"/><signal id="din2_SPECSIG"/><signal id="din1_SPECSIG"/><signal id="din0_SPECSIG" negated="ON"/></pterm><equation id="cs_out11_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB5_2_1"/></d2></equation><equation id="cs_out6_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB5_11_1"/></d2></equation></fblock><fblock id="FB6" pinUse="2" inputUse="6"><macrocell id="FB6_MC1"/><macrocell id="FB6_MC2" pin="FB6_MC2_PIN76" sigUse="6" signal="cs_out12_SPECSIG"><pterms pt1="FB6_2_1"/></macrocell><macrocell id="FB6_MC3"/><macrocell id="FB6_MC4"/><macrocell id="FB6_MC5" pin="FB6_MC5_PIN78"/><macrocell id="FB6_MC6" pin="FB6_MC6_PIN79"/><macrocell id="FB6_MC7"/><macrocell id="FB6_MC8" pin="FB6_MC8_PIN80"/><macrocell id="FB6_MC9" pin="FB6_MC9_PIN81"/><macrocell id="FB6_MC10"/><macrocell id="FB6_MC11" pin="FB6_MC11_PIN82" sigUse="6" signal="cs_out1_SPECSIG"><pterms pt1="FB6_11_1"/></macrocell><macrocell id="FB6_MC12" pin="FB6_MC12_PIN83"/><macrocell id="FB6_MC13"/><macrocell id="FB6_MC14" pin="FB6_MC14_PIN84"/><macrocell id="FB6_MC15" pin="FB6_MC15_PIN87"/><macrocell id="FB6_MC16"/><macrocell id="FB6_MC17" pin="FB6_MC17_PIN88"/><macrocell id="FB6_MC18"/><fbinput id="FB6_I1" signal="cs"/><fbinput id="FB6_I2" signal="din0_SPECSIG"/><fbinput id="FB6_I3" signal="din1_SPECSIG"/><fbinput id="FB6_I4" signal="din2_SPECSIG"/><fbinput id="FB6_I5" signal="din3_SPECSIG"/><fbinput id="FB6_I6" signal="reset"/><pterm id="FB6_2_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG"/><signal id="din2_SPECSIG"/><signal id="din1_SPECSIG" negated="ON"/><signal id="din0_SPECSIG" negated="ON"/></pterm><pterm id="FB6_11_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG" negated="ON"/><signal id="din2_SPECSIG" negated="ON"/><signal id="din1_SPECSIG" negated="ON"/><signal id="din0_SPECSIG"/></pterm><equation id="cs_out12_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB6_2_1"/></d2></equation><equation id="cs_out1_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB6_11_1"/></d2></equation></fblock><fblock id="FB7" pinUse="2" inputUse="6"><macrocell id="FB7_MC1"/><macrocell id="FB7_MC2" pin="FB7_MC2_PIN52" sigUse="6" signal="cs_out13_SPECSIG"><pterms pt1="FB7_2_1"/></macrocell><macrocell id="FB7_MC3"/><macrocell id="FB7_MC4"/><macrocell id="FB7_MC5" pin="FB7_MC5_PIN54"/><macrocell id="FB7_MC6" pin="FB7_MC6_PIN55"/><macrocell id="FB7_MC7"/><macrocell id="FB7_MC8" pin="FB7_MC8_PIN56"/><macrocell id="FB7_MC9" pin="FB7_MC9_PIN57"/><macrocell id="FB7_MC10"/><macrocell id="FB7_MC11" pin="FB7_MC11_PIN58" sigUse="6" signal="cs_out7_SPECSIG"><pterms pt1="FB7_11_1"/></macrocell><macrocell id="FB7_MC12" pin="FB7_MC12_PIN60"/><macrocell id="FB7_MC13"/><macrocell id="FB7_MC14" pin="FB7_MC14_PIN61"/><macrocell id="FB7_MC15" pin="FB7_MC15_PIN62"/><macrocell id="FB7_MC16"/><macrocell id="FB7_MC17" pin="FB7_MC17_PIN63"/><macrocell id="FB7_MC18"/><fbinput id="FB7_I1" signal="cs"/><fbinput id="FB7_I2" signal="din0_SPECSIG"/><fbinput id="FB7_I3" signal="din1_SPECSIG"/><fbinput id="FB7_I4" signal="din2_SPECSIG"/><fbinput id="FB7_I5" signal="din3_SPECSIG"/><fbinput id="FB7_I6" signal="reset"/><pterm id="FB7_2_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG"/><signal id="din2_SPECSIG"/><signal id="din1_SPECSIG" negated="ON"/><signal id="din0_SPECSIG"/></pterm><pterm id="FB7_11_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG" negated="ON"/><signal id="din2_SPECSIG"/><signal id="din1_SPECSIG"/><signal id="din0_SPECSIG"/></pterm><equation id="cs_out13_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB7_2_1"/></d2></equation><equation id="cs_out7_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB7_11_1"/></d2></equation></fblock><fblock id="FB8" pinUse="3" inputUse="6"><macrocell id="FB8_MC1"/><macrocell id="FB8_MC2" pin="FB8_MC2_PIN65" sigUse="6" signal="cs_out14_SPECSIG"><pterms pt1="FB8_2_1"/></macrocell><macrocell id="FB8_MC3"/><macrocell id="FB8_MC4"/><macrocell id="FB8_MC5" pin="FB8_MC5_PIN66"/><macrocell id="FB8_MC6" pin="FB8_MC6_PIN67"/><macrocell id="FB8_MC7"/><macrocell id="FB8_MC8" pin="FB8_MC8_PIN68"/><macrocell id="FB8_MC9" pin="FB8_MC9_PIN69"/><macrocell id="FB8_MC10"/><macrocell id="FB8_MC11" pin="FB8_MC11_PIN70"/><macrocell id="FB8_MC12" pin="FB8_MC12_PIN72"/><macrocell id="FB8_MC13"/><macrocell id="FB8_MC14" pin="FB8_MC14_PIN73"/><macrocell id="FB8_MC15" pin="FB8_MC15_PIN74"/><macrocell id="FB8_MC16"/><macrocell id="FB8_MC17" pin="FB8_MC17_PIN75"/><macrocell id="FB8_MC18"/><fbinput id="FB8_I1" signal="cs"/><fbinput id="FB8_I2" signal="din0_SPECSIG"/><fbinput id="FB8_I3" signal="din1_SPECSIG"/><fbinput id="FB8_I4" signal="din2_SPECSIG"/><fbinput id="FB8_I5" signal="din3_SPECSIG"/><fbinput id="FB8_I6" signal="reset"/><pterm id="FB8_2_1"><signal id="cs" negated="ON"/><signal id="reset" negated="ON"/><signal id="din3_SPECSIG"/><signal id="din2_SPECSIG"/><signal id="din1_SPECSIG"/><signal id="din0_SPECSIG" negated="ON"/></pterm><equation id="cs_out14_SPECSIG" negated="ON"><d2><eq_pterm ptindx="FB8_2_1"/></d2></equation></fblock><vcc/><gnd/><compOpts loc="ON" uim="ON" part="XC95144-7-PQ100" prld="LOW" slew="FAST" mlopt="ON" power="STD" gsropt="ON" gtsopt="ON" inputs="36" keepio="OFF" pinfbk="ON" pterms="25" unused="OFF" exhaust="OFF" gclkopt="ON" wysiwyg="OFF" ignorets="OFF" localfbk="ON" optimize="SPEED"/><specSig value="din&lt;3&gt;" signal="din3_SPECSIG"/><specSig value="din&lt;2&gt;" signal="din2_SPECSIG"/><specSig value="din&lt;1&gt;" signal="din1_SPECSIG"/><specSig value="din&lt;0&gt;" signal="din0_SPECSIG"/><specSig value="cs_out&lt;2&gt;" signal="cs_out2_SPECSIG"/><specSig value="cs_out&lt;3&gt;" signal="cs_out3_SPECSIG"/><specSig value="cs_out&lt;4&gt;" signal="cs_out4_SPECSIG"/><specSig value="cs_out&lt;8&gt;" signal="cs_out8_SPECSIG"/><specSig value="cs_out&lt;9&gt;" signal="cs_out9_SPECSIG"/><specSig value="cs_out&lt;0&gt;" signal="cs_out0_SPECSIG"/><specSig value="cs_out&lt;5&gt;" signal="cs_out5_SPECSIG"/><specSig value="cs_out&lt;10&gt;" signal="cs_out10_SPECSIG"/><specSig value="cs_out&lt;15&gt;" signal="cs_out15_SPECSIG"/><specSig value="cs_out&lt;11&gt;" signal="cs_out11_SPECSIG"/><specSig value="cs_out&lt;6&gt;" signal="cs_out6_SPECSIG"/><specSig value="cs_out&lt;12&gt;" signal="cs_out12_SPECSIG"/><specSig value="cs_out&lt;1&gt;" signal="cs_out1_SPECSIG"/><specSig value="cs_out&lt;13&gt;" signal="cs_out13_SPECSIG"/><specSig value="cs_out&lt;7&gt;" signal="cs_out7_SPECSIG"/><specSig value="cs_out&lt;14&gt;" signal="cs_out14_SPECSIG"/></document>