📄 mcs8051.c
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#define STATE1_1k 117
#define STATE1_2k 118
#define STATE2_1k 119
#define STATE2_2k 120
#define STATE3_1k 121
#define STATE3_2k 122
#define STATE4_1k 123
#define STATE4_2k 124
#define STATE5_1k STATE5_1
#define STATE5_2k STATE5_2
#define STATE6_1k STATE6_1
#define STATE6_2k STATE6_2
static int mcu8051_port0_type (mcu8051_state_t *s)
{
/* operation independent */
/* in STATE2/5, PCL output */
/* in STATE1_1/STATE4_1, code read */
/* operation dependent */
/* in STATE5a-STATE6_1a, DPL or Ri output if read/write*/
/* STATE1a~STATE6_2a: low if DATA read */
/* STATE1a~STATE2a: floating if DATA read */
/* STATE3_1a: data read if DATA read */
/* STATE3_2a~STATE4b: floating if DATA read */
/* STATE6_2a~STATE4_1b: data out if DATA write */
/* STATE4_2b: PCL out if DATA write */
}
static int mcu8051_init (comp_t *comp, void *f)
{
memset (comp+1, 0, sizeof (mcu8051_state_t));
((mcu8051_state_t *)(comp + 1))->psw = 0;
((mcu8051_state_t *)(comp + 1))->regs = ((mcu8051_state_t *)(comp + 1))->reg;
((mcu8051_state_t *)(comp + 1))->state = RESET;
/* initialize CLK gen component */
((mcu8051_state_t *)(comp + 1))->CLK_state = 0;
}
/* volatge between pins,return constant item */
static VA_value_t mcu8051_U_eq (struct compinfo *comp,int pin1,int pin2,void * )
{
}
/* current eqation entering pin */
static VA_value_t mcu8051_I_eq (struct compinfo *comp,int pin, void * )
{
}
/* map a string named pin */
static int mcu8051_str_to_pin_gid (struct compinfo *comp,char *s)
{
}
/* map a digit named pin */
static int mcu8051_pin_gid (struct compinfo *comp,int pin)
{
}
/* enumerate pins belong to a same network
* skip VCC/GND
* Any pins can setup KCL/KVL.
*/
static int mcu8051_sibling_first (struct compinfo *comp, int pin )
{
int x;
switch (pin - comp->pins_start) {
case PIN_GND:
case PIN_VCC:
return pin;
/* if 1, return VCC, else return GND */
case PIN_P0_0:
case PIN_P0_1:
case PIN_P0_2:
case PIN_P0_3:
case PIN_P0_4:
case PIN_P0_5:
case PIN_P0_6:
case PIN_P0_7:
break;
default:
break;
}
return (comp->pins_start + (x? PIN_GND : PIN_VCC ));
}
static int mcu8051_sibling_next (struct compinfo *comp, int pin, int last )
{
return pin; /* no more */
}
/* whether voltage eq applicable between two pins */
static int mcu8051_voltage_eq_ok (struct compinfo *comp, int pin1, int pin2 )
{
}
/* update state of the component */
static int mcu8051_sync (struct compinfo *comp )
{
}
static comp_pintype_t mcu8051_pin_type (struct compinfo *comp, int pin_gid )
{
}
#include "dis-mcs51.c"
#define INSN_1BYTE_1CLK 0x101
#define INSN_1BYTE_2CLK 0x201
#define INSN_1BYTE_4CLK 0x401
#define INSN_2BYTE_1CLK 0x102
#define INSN_2BYTE_2CLK 0x202
#define INSN_3BYTE_2CLK 0x203
/*
* returns the instruction type
*/
static void mcu8051_decode (mcu8051_state_t *state)
{
template *t;
t = &insn[ state->read_buffer[0] ];
switch ((t->clk_num << 8) | t->insn_size) {
case INSN_1BYTE_1CLK:// 0x101
state->state = STATE2_1; break;
case INSN_1BYTE_2CLK:// 0x201
state->state = STATE2_1b; break;
case INSN_1BYTE_4CLK:// 0x401
state->state = STATE2_1h; break;
case INSN_2BYTE_1CLK:// 0x102
state->state = STATE2_1a; break;
case INSN_2BYTE_2CLK:// 0x202
state->state = STATE2_1d; break;
case INSN_3BYTE_2CLK:// 0x203
state->state = STATE2_1f; break;
}
}
static mcu8051_clk (mcu8051_state_t *state)
{
/* from RESET */
/* state machine */
switch (state->state) {
case STATE1_1:
state->state = STATE1_2;
/* get opcode from p0 */
state->read_buffer_ptr = 1;
state->read_buffer[ 0 ]= mcu8051_readp0 (state);
break;
case STATE1_2:
/* decode */
mcu8051_decode (state);
break;
/* single byte 1 clk instruction, do nothing */
case STATE2_1:
case STATE2_2:
case STATE3_1:
case STATE3_2:
case STATE4_1:
state->state++;
break;
case STATE4_2:
state->state = STATE5_1;
break;
/* preapre to read in next opcode and execute the instruction */
case STATE5_1:
mcu8051_exec (state);
state->state = STATE5_2;
break;
case STATE5_2:
state->state = STATE6_1;
break;
case STATE6_1:
/* write back result to register file */
state->state = STATE6_2;
break;
case STATE6_2:
state->state = STATE1_1;
break;
/* two bytes 1 cycle instruction
* read in the decond byte opcode in STATE2
*/
case STATE2_1a:
case STATE2_2a:
case STATE3_1a:
case STATE3_2a:
state->state++;
break;
case STATE4_1a:
state->read_buffer_ptr = 2;
state->read_buffer[ 1 ]= mcu8051_readp0 (state);
state->state = STATE4_2a;
break;
case STATE4_2a:
state->state = STATE5_1;
break;
/* 1 byte 2 cycles instruction
* read in the decond byte opcode in STATE2
*/
case STATE2_1b:
case STATE2_2b:
case STATE3_1b:
case STATE3_2b:
case STATE4_1b:
case STATE4_2b:
case STATE5_1b:
case STATE5_2b:
case STATE6_1b:
case STATE6_2b:
case STATE1_1c:
case STATE1_2c
case STATE2_1c:
case STATE2_2c:
case STATE3_1c:
case STATE3_2c:
case STATE4_1c:
state->state++;
break;
case STATE4_2c:
state->state = STATE5_1;
break;
/* 2 bytes 2 cycles instruction
* read in the decond byte opcode in STATE2
*/
case STATE2_1d:
case STATE2_2d:
case STATE3_1d:
case STATE3_2d:
case STATE4_1d:
case STATE4_2d:
case STATE5_1d:
case STATE5_2d:
case STATE6_1d:
case STATE6_2d:
case STATE1_1e:
case STATE1_2e:
case STATE2_1e:
case STATE2_2e:
case STATE3_1e:
case STATE3_2e:
case STATE4_1e:
state->state++;
break;
case STATE4_2e:
state->state = STATE5_1;
break;
/* 3 bytes 2 cycles instruction
* read in the decond byte opcode in STATE2
*/
case STATE2_1f:
state->state++;
break;
case STATE2_2f:
state->read_buffer_ptr = 2;
state->read_buffer[ 1 ]= mcu8051_readp0 (state);
break;
case STATE3_1f:
case STATE3_2f:
case STATE4_1f:
case STATE4_2f:
case STATE5_1f:
state->state++;
break;
case STATE5_2f:
state->read_buffer_ptr = 3;
state->read_buffer[ 2 ]= mcu8051_readp0 (state);
state->state++;
break;
case STATE6_1f:
case STATE6_2f:
case STATE1_1g:
case STATE1_2g:
case STATE2_1g:
case STATE2_2g:
case STATE3_1g:
case STATE3_2g:
case STATE4_1g:
state->state++;
break;
case STATE4_2g:
state->state = STATE5_1;
break;
/* 1 byte 4 cycles instruction
* read in the decond byte opcode in STATE2
*/
case STATE2_1h:
case STATE2_2h:
case STATE3_1h:
case STATE3_2h:
case STATE4_1h:
case STATE4_2h:
case STATE5_1h:
case STATE5_2h:
case STATE6_1h:
case STATE6_2h:
case STATE1_1i:
case STATE1_2i:
case STATE2_1i:
case STATE2_2i:
case STATE3_1i:
case STATE3_2i:
case STATE4_1i:
case STATE4_2i:
case STATE5_1i:
case STATE5_2i:
case STATE6_1i:
case STATE6_2i:
case STATE1_1j:
case STATE1_2j:
case STATE2_1j:
case STATE2_2j:
case STATE3_1j:
case STATE3_2j:
case STATE4_1j:
case STATE4_2j:
case STATE5_1j:
case STATE5_2j:
case STATE6_1j:
case STATE6_2j:
case STATE1_1k:
case STATE1_2k:
case STATE2_1k:
case STATE2_2k:
case STATE3_1k:
case STATE3_2k:
case STATE4_1k:
state->state++;
break;
case STATE4_2k:
state->state = STATE5_1;
break;
}
}
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