mcs8051.c

circuit calculation program

#include <stdio.h>
#include <stdlib.h>

#include "component.h"
#include "eq.h"
#include "drive.h"

static int mcu8051_init (comp_t *comp, void *f);
        /* volatge between pins,return constant item      */
static VA_value_t mcu8051_U_eq (struct compinfo *comp,int pin1,int pin2,void * ); 
        /* current eqation entering pin                   */
static VA_value_t mcu8051_I_eq (struct compinfo *comp,int pin, void * ); 
        /* map a string named pin                         */
static int mcu8051_str_to_pin_gid (struct compinfo *comp,char *s);         
	/* map a digit  named pin                         */
static int mcu8051_pin_gid (struct compinfo *comp,int pin);
	/* enumerate pins belong to a same network        */
static int mcu8051_sibling_first (struct compinfo *comp, int pin );
static int mcu8051_sibling_next (struct compinfo *comp, int pin, int last );

	/* whether voltage eq applicable between two pins    */
static int mcu8051_voltage_eq_ok (struct compinfo *comp, int pin1, int pin2 );
	/* update state of the component */
static int mcu8051_sync (struct compinfo *comp );

	/* is the pin a special pin? VCC,GND,IOPORT,...           */
static comp_pintype_t mcu8051_pin_type (struct compinfo *comp, int pin_gid );	

typedef struct mcu8051_state_def {
	int state;
	
	/* the invertor */
	float CLK_state;
	/* the latch for each port */
	unsigned char latch_p0;
	unsigned char latch_p1;	
	unsigned char latch_p2;	
	unsigned char latch_p3;	

	/* alternate output function : p3 */
	unsigned char function_p3;

	
		
	/* internal 256 B registers */
	unsigned char reg[256];
	
	/* registers bank: r0-r7*/
	unsigned char *regs;      
	/* internal 128 B ram */
	unsigned char ram[256];
	
	/* code cache */
	unsigned char read_buffer[4];
	int read_buffer_ptr;
	
	/* whether single step mode */
	unsigned char single_step;
	
	
	
} mcu8051_state_t;

#define psw    reg[ 0xD0 ]
#define pc     reg[ 0x00 ];
#define p0     reg[ 0x80 ];
#define p1     reg[ 0x90 ];
#define p2     reg[ 0xa0 ];
#define p3     reg[ 0xb0 ];
#define A      reg[ 0xe0 ];
#define B      reg[ 0xf0 ];
#define sp     reg[ 0x81 ];
#define dpl    reg[ 0x82 ];
#define dph    reg[ 0x83 ];
#define tcon   reg[ 0x88 ];
#define tmod   reg[ 0x89 ];
#define t2con  reg[ 0xc8 ];
#define ip     reg[ 0xb8 ];
#define ie     reg[ 0xa8 ];
#define th0    reg[ 0x8c ];
#define tl0    reg[ 0x8a ];
#define th1    reg[ 0x8d ];
#define tl1    reg[ 0x8b ];
#define th2    reg[ 0xcd ];
#define tl2    reg[ 0xcc ];
#define rcap2h reg[ 0xcb ];
#define rcap2l reg[ 0xca ];
#define scon   reg[ 0x98 ];
#define sbuf   reg[ 0x99 ];
#define pcon   reg[ 0x87 ];
#define r0     regs[ 0   ];
#define r1     regs[ 1   ];
#define r2     regs[ 2   ];
#define r3     regs[ 3   ];
#define r4     regs[ 4   ];
#define r5     regs[ 5   ];
#define r6     regs[ 6   ];
#define r7     regs[ 7   ];	

/* pin number */
#define PIN_P1_0 0
#define PIN_P1_1 1
#define PIN_P1_2 2
#define PIN_P1_3 3
#define PIN_P1_4 4
#define PIN_P1_5 5
#define PIN_P1_6 6
#define PIN_P1_7 7

#define PIN_RESET 8

#define PIN_P3_0  9
#define PIN_RXD   9
#define PIN_P3_1  10
#define PIN_TXD   10
#define PIN_P3_2  11
#define PIN_INT0  11
#define PIN_P3_3  12 
#define PIN_INT1  12 
#define PIN_P3_4  13
#define PIN_T0    13
#define PIN_P3_5  14
#define PIN_T1    14
#define PIN_P3_6  15
#define PIN_WR    15
#define PIN_P3_7  16
#define PIN_RD    16

#define PIN_XTAL2 17 
#define PIN_XTAL1 18
#define PIN_GND   19

#define PIN_P2_0  20
#define PIN_P2_1  21
#define PIN_P2_2  22
#define PIN_P2_3  23 
#define PIN_P2_4  24
#define PIN_P2_5  25
#define PIN_P2_6  26
#define PIN_P2_7  27

#define PIN_PESN  28
#define PIN_ALE   29
#define PIN_PROG  29
#define PIN_VPP   30
#define PIN_EA    30

#define PIN_P0_7  31
#define PIN_P0_6  32
#define PIN_P0_5  33
#define PIN_P0_4  34 
#define PIN_P0_3  35
#define PIN_P0_2  36
#define PIN_P0_1  37
#define PIN_P0_0  38

#define PIN_VCC   39


#define MASK_P1_0 1
#define MASK_P1_1 2
#define MASK_P1_2 4
#define MASK_P1_3 8
#define MASK_P1_4 0x10
#define MASK_P1_5 0x20
#define MASK_P1_6 0x40
#define MASK_P1_7 0x80

#define MASK_P2_0 1
#define MASK_P2_1 2
#define MASK_P2_2 4
#define MASK_P2_3 8
#define MASK_P2_4 0x10
#define MASK_P2_5 0x20
#define MASK_P2_6 0x40
#define MASK_P2_7 0x80

#define MASK_P3_0 1
#define MASK_P3_1 2
#define MASK_P3_2 4
#define MASK_P3_3 8
#define MASK_P3_4 0x10
#define MASK_P3_5 0x20
#define MASK_P3_6 0x40
#define MASK_P3_7 0x80

#define MASK_P0_7 1
#define MASK_P0_6 2
#define MASK_P0_5 4
#define MASK_P0_4 8
#define MASK_P0_3 0x10
#define MASK_P0_2 0x20
#define MASK_P0_1 0x40
#define MASK_P0_0 0x80

compclass_t mcu8051 = {
	"mcu8051", 
	mcu8051_init, 
	mcu8051_str_to_pin_gid,
	mcu8051_pin_gid, 
	mcu8051_U_eq, 
	mcu8051_I_eq, 
	NULL,
	1,40, 
	sizeof (mcu8051_state_t),
	mcu8051_sibling_first, 
	mcu8051_sibling_next,
	mcu8051_voltage_eq_ok,
	mcu8051_sync };


#define RESET    0
#define RESETa   125
#define RESETb   126
#define RESETc   127

#define STATE1_1 1
#define STATE1_2 2
#define STATE2_1 3
#define STATE2_2 4
#define STATE3_1 5
#define STATE3_2 6
#define STATE4_1 7
#define STATE4_2 8
#define STATE5_1 9
#define STATE5_2 10
#define STATE6_1 11
#define STATE6_2 12

/* 2 byte single cycle instruction*/
#define STATE1_1a STATE1_1
#define STATE1_2a STATE1_2
#define STATE2_1a 15
#define STATE2_2a 16
#define STATE3_1a 17
#define STATE3_2a 18
#define STATE4_1a 19
#define STATE4_2a 20
#define STATE5_1a STATE5_1
#define STATE5_2a STATE5_2
#define STATE6_1a STATE6_1
#define STATE6_2a STATE6_2

/* 1 byte 2 cycle instruction, such as RET,RETI,MOVX A,@Ri */
#define STATE1_1b STATE1_1
#define STATE1_2b STATE1_2
#define STATE2_1b 23
#define STATE2_2b 24
#define STATE3_1b 25
#define STATE3_2b 26
#define STATE4_1b 27
#define STATE4_2b 28
#define STATE5_1b 29
#define STATE5_2b 30
#define STATE6_1b 31
#define STATE6_2b 32
#define STATE1_1c 33
#define STATE1_2c 34
#define STATE2_1c 35
#define STATE2_2c 36
#define STATE3_1c 37
#define STATE3_2c 38
#define STATE4_1c 39
#define STATE4_2c 40
#define STATE5_1c STATE5_1
#define STATE5_2c STATE5_2
#define STATE6_1c STATE6_1
#define STATE6_2c STATE6_2

/* 2 byte 2 cycle instruction, such as JNC rel */
#define STATE1_1d STATE1_1
#define STATE1_2d STATE1_2
#define STATE2_1d 43
#define STATE2_2d 44
#define STATE3_1d 45
#define STATE3_2d 46
#define STATE4_1d 47
#define STATE4_2d 48
#define STATE5_1d 49
#define STATE5_2d 50
#define STATE6_1d 51
#define STATE6_2d 52
#define STATE1_1e 53
#define STATE1_2e 54
#define STATE2_1e 55
#define STATE2_2e 56
#define STATE3_1e 57
#define STATE3_2e 58
#define STATE4_1e 59
#define STATE4_2e 60
#define STATE5_1e STATE5_1
#define STATE5_2e STATE5_2
#define STATE6_1e STATE6_1
#define STATE6_2e STATE6_2


/* 3 byte 2 cycle instruction, such as JB bit,rel */
#define STATE1_1f STATE1_1
#define STATE1_2f STATE1_2
#define STATE2_1f 63
#define STATE2_2f 64
#define STATE3_1f 65
#define STATE3_2f 66
#define STATE4_1f 67
#define STATE4_2f 68
#define STATE5_1f 69
#define STATE5_2f 70
#define STATE6_1f 71
#define STATE6_2f 72
#define STATE1_1g 73
#define STATE1_2g 74
#define STATE2_1g 75
#define STATE2_2g 76
#define STATE3_1g 77
#define STATE3_2g 78
#define STATE4_1g 79
#define STATE4_2g 80
#define STATE5_1g STATE5_1
#define STATE5_2g STATE5_2
#define STATE6_1g STATE6_1
#define STATE6_2g STATE6_2


/* 1 byte 4 cycle instruction, such as MUL,DIV */
#define STATE1_1h STATE1_1
#define STATE1_2h STATE1_2
#define STATE2_1h 83
#define STATE2_2h 84
#define STATE3_1h 85
#define STATE3_2h 86
#define STATE4_1h 87
#define STATE4_2h 88
#define STATE5_1h 89
#define STATE5_2h 90
#define STATE6_1h 91
#define STATE6_2h 92
#define STATE1_1i 93
#define STATE1_2i 94
#define STATE2_1i 95
#define STATE2_2i 96
#define STATE3_1i 97
#define STATE3_2i 98
#define STATE4_1i 99
#define STATE4_2i 100
#define STATE5_1i 101
#define STATE5_2i 102
#define STATE6_1i 103
#define STATE6_2i 104
#define STATE1_1j 105
#define STATE1_2j 106
#define STATE2_1j 107
#define STATE2_2j 108
#define STATE3_1j 109
#define STATE3_2j 110
#define STATE4_1j 111
#define STATE4_2j 112
#define STATE5_1j 113
#define STATE5_2j 114
#define STATE6_1j 115
#define STATE6_2j 116