mcs_51.tan.qmsg

VHDL实现：单片机与FPGA接口通信源文件

{ "Info" "ITAN_NO_REG2REG_EXIST" "LATCH1 " "Info: No valid register-to-register data paths exist for clock \"LATCH1\"" {  } {  } 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "P2\[4\] " "Info: No valid register-to-register data paths exist for clock \"P2\[4\]\"" {  } {  } 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "P2\[6\] " "Info: No valid register-to-register data paths exist for clock \"P2\[6\]\"" {  } {  } 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "P2\[1\] " "Info: No valid register-to-register data paths exist for clock \"P2\[1\]\"" {  } {  } 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "P2\[0\] " "Info: No valid register-to-register data paths exist for clock \"P2\[0\]\"" {  } {  } 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "P2\[2\] " "Info: No valid register-to-register data paths exist for clock \"P2\[2\]\"" {  } {  } 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "P2\[3\] " "Info: No valid register-to-register data paths exist for clock \"P2\[3\]\"" {  } {  } 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "WR " "Info: No valid register-to-register data paths exist for clock \"WR\"" {  } {  } 0}