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Newsgroups: comp.sys.mac.hardwarePath: cantaloupe.srv.cs.cmu.edu!crabapple.srv.cs.cmu.edu!fs7.ece.cmu.edu!europa.eng.gtefsd.com!gatech!news-feed-1.peachnet.edu!umn.edu!csus.edu!netcom.com!rayFrom: ray@netcom.com (Ray Fischer)Subject: Re: 68040 Specs.Message-ID: <rayC5Myqo.o8@netcom.com>Organization: Netcom. San Jose, CaliforniaReferences: <1qkr6n$18c@bigboote.WPI.EDU>Date: Sat, 17 Apr 1993 16:20:48 GMTLines: 43patrickd@wpi.WPI.EDU (Lazer) writes ...>I'd appreciate it greatly if someone could E-mail me the following:>(if you only know one, that's fine)>1) Specs for the 68040 (esp. how it compares to the Pentium)Specs for the 68040 can fill a 500 page book. Some highlights are...32-bit address space w/ 32-bit data width. 18 32-bit integer registers & 8 80-bit floating point registers. 8K copyback capable caches,4-way set associative. Typical 1.2 clocks/integer instruction. 5clocks for a floating point multiply.(interesting aside: the 68040 can multiply two 80-bit floating pointnumbers in less time than it can multiply two 32-bit integers)>2) Specs for the 68060 with estimated cost, release date, etc...More of the same but with multiple instruction dispatching. Figureabout 0.8 clocks per instruction typical (my guess). But the Motorolaguys are pretty bright, it may be less.>I'm interested in speeds, systems it can run (Windows NT, RISC, or whatever),>costs, bus info, register info. All the technical info.Call Motorola. I'm not typing it all in.>I am hoping that the 68040 can win yet another battle against the intel people.I'm predicting that both the 680x0 and x86 lines are reaching theirends. New experimental processors have 64-bit data pathways and canschedule up to 8 out of 32 instructions each clock cycle. That sortof trick can't really be done with CISC architectures.I finally saw some details on the 586/Pentium and was not greatlyimpressed. They've finally done some work on the FPU to get it up tospeed, but otherwise it's only going to be a 2x speedup. And to getthat they're using two integer units, larger caches, and a branchtarget buffer. Yes, I know they're talking about 100MHz processors.Big whoop. Designing a 100MHz board is difficult and reallyexpensive. Priced 15ns memory chips lately?-- Ray Fischer "Convictions are more dangerous enemies of truthray@netcom.com than lies." -- Friedrich Nietzsche
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