mon.h

基于ARM核的HMS7202

/*
 * Copyright (c) 2000-2001 Hynix Semiconductor, Ltd. All rights reserved.
 */

/*
 * File: mon.h
 * Jungjun Kim
 */
#ifndef _MON_H
#define _MON_H

#define ARMON_VERSION  "1.2"

/* Test Level */
#define BASIC_LEVEL 0
#define AUTO_LEVEL  BASIC_LEVEL
#define FULL_LEVEL  1
#define MENU_LEVEL  2


#define MON_FAIL -1
#define MON_OK   0

#define SUCCESS 0
#define FAIL -1

#ifndef NULL
# define NULL ((void *) 0)
#endif

#define false 0
#define true  1

#define FALSE 0
#define TRUE  1

#define CMDLINE_SIZE 256
#define ARG_SIZE 256

#ifndef __ASSEMBLY__

#define GET_INT(arg, val, ret) { \
	if(strncmp(arg,"0x",2) == 0) { \
		ret = sscanf(arg, "0x%x", &val); \
	} \
	else { \
		ret = sscanf(arg, "%d", &val); \
	} \
}

#define ALIGN_FAIL(s, a) { \
	ser_printf("ERROR: argument(0x%08x)should be aligned by %d\"\n", s, a); \
	return MON_FAIL; \
	}

#define assert(a) \
	if(! (a) ) { \
	ser_printf("panic: (%s:%d) failed assertion %s",__FILE__,__LINE__,a); \
	while(1); \
	}


#ifndef __TYPE_UINT32__
#define __TYPE_UINT32__
typedef unsigned int uint32;
#endif
#ifndef __TYPE_UINT16__
#define __TYPE_UINT16__
typedef unsigned short uint16;
#endif
#ifndef __TYPE_UINT8__
#define __TYPE_UINT8__
typedef unsigned char uint8;
#endif


#define PANIC(s) { \
	ser_printf(s); \
	while(1); \
}

#ifndef _SYSCALL_H
#include <syscall.h>
#define ENTER_SVC() sys_mon()
#define EXIT_SVC() { \
	}
#endif

#ifndef __memio_h
#include <memio.h>
#endif

#endif

#define RCS0 0x0
#define RCS1 0x1
#define RCS2 0x2
#define RCS3 0x3
#define RCS4 0x3
#define RCS5 0x3

#define SIZE_1K  1024
#define SIZE_4K  4096
#define SIZE_1M  0x00100000
#define SIZE_4M  0x00400000
#define SIZE_8M  0x00800000
#define SIZE_16M 0x01000000
#define SIZE_32M 0x02000000
#define SIZE_64M 0x04000000

#define RCS0_BASE 0x0
#define RCS0_BASE 0x0
#define RCS1_BASE 0x04000000
#define RCS2_BASE 0x08000000
#define RCS3_BASE 0x0c000000
#define RCS4_BASE 0x10000000
#define RCS5_BASE 0x14000000
#define SDRAM_BASE 0x40000000
#if defined(HEI_ARM7) &&  HEI_ARM7 == 1
#define SDRAM_SIZE SIZE_32M

#elif defined(HEI_ARM7) &&  HEI_ARM7 == 2

 #define SDRAM_SIZE SIZE_64M


#else
#error "Unknown Arch"
#endif

#define IO_BASE 0x80000000
#define IO_SIZE SIZE_1M

#define VIRT_SDRAM_BASE (SDRAM_BASE + 0x80000000)

#define MMU_FULL_ACCESS (3 << 10)
#define MMU_DOMAIN  (0 << 5)
#define MMU_CACHEABLE   (1 << 3)
#define MMU_BUFFERABLE  (1 << 2)
#define MMU_SECTION     (2)
#define MMU_SECDESC  (MMU_FULL_ACCESS | MMU_DOMAIN | MMU_SECTION)


/*
 *  Some ARM720 CPSR bit discriptions
 */
#define Mode_USR32	0x10
#define Mode_FIQ32	0x11
#define Mode_IRQ32	0x12
#define Mode_ABT32	0x17
#define Mode_UND32	0x1b
#define Mode_SVC32	0x13

#define I_Bit		0x80
#define F_Bit		0x40

/*
 *  MMU Register discription
 */

#define CtrlMMU			1
#define CtrlAlign		2
#define CtrlCache		4
#define CtrlWBuff		8
#define CtrlBigEnd		128
#define CtrlSystem		256
#define CtrlROM			512

#endif