📄 reg7202.h
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#define USBdmamaskMKdmatx 0x1
// deviceid
#define USBdeviceid (USBbase+0x18)
#define USBdeviceidMask 0xffffffff
// devclass
#define USBdevclass (USBbase+0x1c)
#define USBdevclassMask 0xffffffff
// intclass
#define USBintclass (USBbase+0x20)
#define USBintclassMask 0xffffffff
// setup0
#define USBsetup0 (USBbase+0x24)
#define USBsetup0Mask 0xffffffff
// setup1
#define USBsetup1 (USBbase+0x28)
#define USBsetup1Mask 0xffffffff
// endp0rd
#define USBendp0rd (USBbase+0x2c)
#define USBendp0rdMask 0xffffffff
// endp0wt
#define USBendp0wt (USBbase+0x30)
#define USBendp0wtMask 0xffffffff
// endp1rd
#define USBendp1rd (USBbase+0x34)
#define USBendp1rdMask 0xffffffff
// endp2wt
#define USBendp2wt (USBbase+0x38)
#define USBendp2wtMask 0xffffffff
//---- 7202 reg.: match with old ver code for 7201 ---------------------
#define US_MODEREG (USBendpctrl) // TX/RX enable
#define US_MASKREG (USBintmask) // MASK TX/RX
#define US_STATUS (USBstatus) // status(rcv=full | send=empty)
#define US_RXDATA (USBendp1rd)
#define US_TXDATA (USBendp2wt)
#define US_TIC (USBgctrl) // for DMA disable
#define US_CLKEN (USBswreset) // USB PLL enable
#define US_DMAMASK (USBgctrl) // for DMA disable
#define US_MODE_TX (USBendpctrlEP2En) // Endpoint 2 Tx enable
#define US_MODE_RX (USBendpctrlEP1En) // Endpoint 1 Rx enable
#define US_MASK_TX (USBintmaskMKep2empty) // interrupt mask-endpoint 2 empty(TX)
#define US_MASK_RX (USBintmaskMKep1full) // interrupt mask-endpoint 1 full(RX)
#define US_STATUS_TX (USBstatusep2empty) // status of endpoint 2 = empty(TX)
#define US_STATUS_RX (USBstatusep1full) // status of endpoint 1 = full(RX)
/****************************************************************/
/* Sound Interface Registers */
/****************************************************************/
#define SOUND_BASE (0x80013000)
#define SCONT SOUND_BASE
#define SoundSDADR (SOUND_BASE+0x4)
#define SoundSTOR (SOUND_BASE+0x8)
#define SoundSTIR (SOUND_BASE+0x0c)
#define SoundTIC (SOUND_BASE+0x10)
/****************************************************************/
/* The 16C552 UART Registers */
/****************************************************************/
#define SerialIObase (0x80020000)
#define SioAData (SerialIObase)
#define SioBData (SerialIObase + 0x1000)
#define UART0_BASE 0x80020000
#define UART1_BASE 0x80021000
#define UART2_BASE 0x8002d000
#define UART3_BASE 0x8002e000
#define UART_BaseAddr 0x80020000
#define UART_RHR_OFFSET 0
#define UART_RBR_OFFSET 0
#define UART_THR_OFFSET 0
#define UART_IER_OFFSET 0x4
#define UART_IIR_OFFSET 0x8
#define UART_FCR_OFFSET 0x8
#define UART_LCR_OFFSET 0xc
#define UART_MCR_OFFSET 0x10
#define UART_LSR_OFFSET 0x14
#define UART_MSR_OFFSET 0x18
#define UART_SCR_OFFSET 0x1c
#define UART_DLL_OFFSET 0
#define UART_DLM_OFFSET 0x4
#define UART_FCR_ENABLE_FIFO 0x01 // Enable the FIFO
#define UART_FCR_CLEAR_RCVR 0x02 // Clear the RCVR FIFO
#define UART_FCR_CLEAR_XMIT 0x04 // Clear the XMIT FIFO
#define UART_FCR_DMA_SELECT 0x08 // For DMA applications
#define UART_FCR_TRIGGER_MASK 0xC0 // Mask for the FIFO trigger range
#define UART_FCR_TRIGGER_1 0x00 // Mask for trigger set at 1
#define UART_FCR_TRIGGER_4 0x40 // Mask for trigger set at 4
#define UART_FCR_TRIGGER_8 0x80 // Mask for trigger set at 8
#define UART_FCR_TRIGGER_14 0xC0 // Mask for trigger set at 14
#define UART_LCR_DLAB 0x80 // Divisor latch access bit
#define UART_LCR_SBC 0x40 // Set break control
#define UART_LCR_SPAR 0x20 // Stick parity (?)
#define UART_LCR_EPAR 0x10 // Even parity select
#define UART_LCR_PARITY 0x08 // Parity Enable
#define UART_LCR_STOP 0x04 // Stop bits: 0=1 stop bit, 1= 2 stop bits
#define UART_LCR_WLEN5 0x00 // Wordlength: 5 bits
#define UART_LCR_WLEN6 0x01 // Wordlength: 6 bits
#define UART_LCR_WLEN7 0x02 // Wordlength: 7 bits
#define UART_LCR_WLEN8 0x03 // Wordlength: 8 bits
//
// These are the definitions for the Line Status Register
//
#define UART_LSR_TEMT 0x40 // Transmitter empty
#define UART_LSR_THRE 0x20 // Transmit-hold-register empty
#define UART_LSR_BI 0x10 // Break interrupt indicator
#define UART_LSR_FE 0x08 // Frame error indicator
#define UART_LSR_PE 0x04 // Parity error indicator
#define UART_LSR_OE 0x02 // Overrun error indicator
#define UART_LSR_DR 0x01 // Receiver data ready
//
// These are the definitions for the Interrupt Identification Register
//
#define UART_IIR_NO_INT 0x01 // No interrupts pending
#define UART_IIR_ID 0x0E // Mask for the interrupt ID
#define UART_IIR_MSI 0x00 // Modem status interrupt
#define UART_IIR_THRI 0x02 // Transmitter holding register empty
#define UART_IIR_RDI 0x04 // Receiver data interrupt
#define UART_IIR_RLSI 0x06 // Receiver line status interrupt
#define UART_IIR_TIMEOUT 0x0C // Receiver data interrupt
//
// These are the definitions for the Interrupt Enable Register
//
#define UART_IER_MSI 0x08 // Enable Modem status interrupt
#define UART_IER_RLSI 0x04 // Enable receiver line status interrupt
#define UART_IER_THRI 0x02 // Enable Transmitter holding register int.
#define UART_IER_RDI 0x01 // Enable receiver data interrupt
//
// These are the definitions for the Modem Control Register
//
#define UART_MCR_LOOP 0x10 // Enable loopback test mode
#define UART_MCR_OUT2 0x08 // Out2 complement
#define UART_MCR_OUT1 0x04 // Out1 complement
#define UART_MCR_RTS 0x02 // RTS complement
#define UART_MCR_DTR 0x01 // DTR complement
//
// These are the definitions for the Modem Status Register
//
#define UART_MSR_DCD 0x80 // Data Carrier Detect
#define UART_MSR_RI 0x40 // Ring Indicator
#define UART_MSR_DSR 0x20 // Data Set Ready
#define UART_MSR_CTS 0x10 // Clear to Send
#define UART_MSR_DDCD 0x08 // Delta DCD
#define UART_MSR_TERI 0x04 // Trailing edge ring indicator
#define UART_MSR_DDSR 0x02 // Delta DSR
#define UART_MSR_DCTS 0x01 // Delta CTS
#define UART_MSR_ANY_DELTA 0x0F // Any of the delta bits!
/*******************************************************************************/
/* ScratchPad Register - SPR */
/*******************************************************************************/
/* This is a user register for any required bit storage required */
#define SPR_User_0 0x01
#define SPR_User_1 0x02
#define SPR_User_2 0x04
#define SPR_User_3 0x08
#define SPR_User_4 0x10
#define SPR_User_5 0x20
#define SPR_User_6 0x40
#define SPR_User_7 0x80
/*******************************************************************************/
/*Divisor Latch Lower and Upper Byte Values - DLL DLM */
/*******************************************************************************/
/* These are the required 16 bit divisor values for the internal baud rate based on a 1.8MHz Clock */
#define DLM_50_Baud 0x09
#define DLL_50_Baud 0x00
#define DLM_110_Baud 0x04
#define DLL_110_Baud 0x17
#define DLM_150_Baud 0x03
#define DLL_150_Baud 0x00
#define DLM_300_Baud 0x01
#define DLL_300_Baud 0x5c
#define DLM_600_Baud 0x00
#define DLL_600_Baud 0xc0
#define DLM_1200_Baud 0x00
#define DLL_1200_Baud 0x60
#define DLM_2400_Baud 0x00
#define DLL_2400_Baud 0x30
#define DLM_4800_Baud 0x00
#define DLL_4800_Baud 0x18
#define DLM_7200_Baud 0x00
#define DLL_7200_Baud 0x10
#define DLM_9600_Baud 0x00
#define DLL_9600_Baud 0x0c
#define DLM_19200_Baud 0x00
#define DLL_19200_Baud 0x06
#define DLM_38400_Baud 0x00
#define DLL_38400_Baud 0x03
#define DLM_56000_Baud 0x00
#define DLL_56000_Baud 0x02
#define DLM_115200_Baud 0x00
#define DLL_115200_Baud 0x01
/****************************************************************/
/* Keyboard Registers */
/****************************************************************/
#define KBbase (0x80022000)
#define KBCr KBbase
#define KbScnMask 0x80 // Scan En 0 Start and stop scanning (bit 7)
#define KbScnStart 0x80 // 0 = stop
#define KbScnStop 0x00 // 1 = start
#define KbTicMask 0x40 // TIC EN 0 TIC mode (bit 6)
#define KbTickDisable 0x00 // 0 = disable
#define KbTickEnable 0x40 // 1 = enable
#define KbTClkMask 0x20 // TIC Clock EN 0 Select input clk (bit 5)
#define KbTClkP 0x00 // 0 = PCLK
#define KbTClkT 0x20 // 1 = TCLK
#define KbScnClkMask 0x10 // Scan Clock select (bit 4)
// Select Scan Clk for fast test
#define KbScnNorm 0x00 // 0 = normal scan clk
#define KbScnTest 0x10 // 1 = test mode
// scan clk = 1.84MHz
#define KbRsv 0x08 // Reserved (bit 3)
#define KbPwrDnMask 0x04 // Power down 0 Power down (bit 2)
#define KbPwrDn 0x00 // 0 = power down mode, where clock is not operating
#define KbPwrUp 0x04 // 1 = normal mode,where clock is operating
#define KbClkSelMask 0x03 // Scanning rate control (bit 1:0)
#define KbClk184 0x00 // 00 = 1.84MHz
#define KbClk2800 0x01 // 01 = 28kHz
#define KbClk1400 0x02 // 10 = 14kHz
#define KbClk700 0x03 // 11 = 7kHz
#define KBTicOut (KBbase+0x04) // This is a test register that allows the KBD output=20
// signal to the keypad to be read back in test mode.=20
// No more than two bits can be reset, causing the interface=20
// to scan only one line during each scan period,=20
// except when the keyboard is disabled (ScanEn bit of KBCR=0).
#define Scn1LineMask 0x400 // (bit 10)
#define Scn1LineYes 0x000 // 0 = 1st Line will be scanned
#define Scn1LineNo 0x400 // 1 = no scan
#define Scn2LineMask 0x200 // (bit 9)
#define Scn2LineYes 0x000 // 0 = 1st Line will be scanned
#define Scn2LineNo 0x200 // 1 = no scan
#define Scn3LineMask 0x100 // (bit 8)
#define Scn3LineYes 0x000 // 0 = 1st Line will be scanned
#define Scn3LineNo 0x100 // 1 = no scan
#define Scn4LineMask 0x080 // (bit 7)
#define Scn4LineYes 0x000 // 0 = 1st Line will be scanned
#define Scn4LineNo 0x080 // 1 = no scan
#define Scn5LineMask 0x040 // (bit 6)
#define Scn5LineYes 0x000 // 0 = 1st line will be scanned
#define Scn5LineNo 0x040 // 1 = no scan
#define Scn6LineMask 0x020 // (bit 5)
#define Scn6LineYes 0x000 // 0 = 1st line will be scanned
#define Scn6LineNo 0x020 // 1 = no scan
#define Scn7LineMask 0x010 // (bit 4)
#define Scn7LineYes 0x000 // 0 = 1st line will be scanned
#define Scn7LineNo 0x010 // 1 = no scan
#define Scn8LineMask 0x008 // (bit 3)
#define Scn8LineYes 0x000 // 0 = 1st line will be scanned
#define Scn8LineNo 0x008 // 1 = no scan
#define Scn9LineMask 0x004 // (bit 2)
#define Scn9LineYes 0x000 // 0 = 1st line will be scanned
#define Scn9LineNo 0x004 // 1 = no scan
#define Scn10LineMask 0x002 // (bit 1)
#define Scn10LineYes 0x000 // 0 = 1st line will be scanned
#define Scn10LineNo 0x002 // 1 = no scan
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