📄 test0330.rpt
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- 127 H DFFE t 0 0 0 1 6 0 7 |add25:52|STATMACH:7|COUN1 (|add25:52|STATMACH:7|:11)
- 122 H TFFE t 0 0 0 1 1 0 7 |add25:52|STATMACH:7|COUN0 (|add25:52|STATMACH:7|:12)
(76) 120 H SOFT t 0 0 0 0 2 0 1 |add25:52|STATMACH:8|LPM_ADD_SUB:58|addcore:adder|addcore:adder0|result_node1
- 119 H SOFT t 0 0 0 0 4 0 1 |add25:52|STATMACH:8|LPM_ADD_SUB:58|addcore:adder|addcore:adder0|result_node3
(77) 123 H DFFE t 0 0 0 1 5 0 5 |add25:52|STATMACH:8|:3
- 121 H DFFE t 0 0 0 1 6 0 5 |add25:52|STATMACH:8|COUN3 (|add25:52|STATMACH:8|:9)
(75) 118 H TFFE t 0 0 0 1 3 0 5 |add25:52|STATMACH:8|COUN2 (|add25:52|STATMACH:8|:10)
- 113 H DFFE t 0 0 0 1 6 0 7 |add25:52|STATMACH:8|COUN1 (|add25:52|STATMACH:8|:11)
(81) 128 H TFFE t 0 0 0 1 1 0 7 |add25:52|STATMACH:8|COUN0 (|add25:52|STATMACH:8|:12)
(14) 32 B SOFT t 0 0 0 0 2 0 1 |add25:52|STATMACH:9|LPM_ADD_SUB:58|addcore:adder|addcore:adder0|result_node1
- 103 G SOFT t 0 0 0 0 4 0 1 |add25:52|STATMACH:9|LPM_ADD_SUB:58|addcore:adder|addcore:adder0|result_node3
(68) 105 G DFFE t 0 0 0 1 5 0 4 |add25:52|STATMACH:9|:3
(65) 101 G DFFE t 0 0 0 1 6 0 5 |add25:52|STATMACH:9|COUN3 (|add25:52|STATMACH:9|:9)
- 22 B TFFE t 0 0 0 1 3 0 5 |add25:52|STATMACH:9|COUN2 (|add25:52|STATMACH:9|:10)
(63) 97 G DFFE t 0 0 0 1 6 0 7 |add25:52|STATMACH:9|COUN1 (|add25:52|STATMACH:9|:11)
(20) 21 B TFFE t 0 0 0 1 1 0 7 |add25:52|STATMACH:9|COUN0 (|add25:52|STATMACH:9|:12)
- 36 C SOFT t 0 0 0 0 2 0 1 |add25:52|STATMACH:10|LPM_ADD_SUB:58|addcore:adder|addcore:adder0|result_node1
- 41 C SOFT t 0 0 0 0 4 0 1 |add25:52|STATMACH:10|LPM_ADD_SUB:58|addcore:adder|addcore:adder0|result_node3
(29) 38 C DFFE t 0 0 0 1 6 0 4 |add25:52|STATMACH:10|COUN3 (|add25:52|STATMACH:10|:9)
- 42 C TFFE t 0 0 0 1 3 0 4 |add25:52|STATMACH:10|COUN2 (|add25:52|STATMACH:10|:10)
(24) 46 C DFFE t 0 0 0 1 6 0 6 |add25:52|STATMACH:10|COUN1 (|add25:52|STATMACH:10|:11)
(23) 48 C TFFE t 0 0 0 1 1 0 6 |add25:52|STATMACH:10|COUN0 (|add25:52|STATMACH:10|:12)
- 26 B SOFT t 0 0 0 0 2 0 1 |countled:28|lpm_add_sub:39|addcore:adder|addcore:adder0|result_node1
- 54 D SOFT t 0 0 0 0 3 0 1 |countled:28|lpm_add_sub:39|addcore:adder|addcore:adder0|result_node2
(22) 17 B DFFE t 0 0 0 0 4 7 30 |countled:28|:36
- 18 B DFFE t 0 0 0 0 4 7 31 |countled:28|:37
- 20 B TFFE t 0 0 0 0 4 7 29 |countled:28|:38
- 98 G SOFT t 0 0 0 0 2 0 1 |fenpin10:30|lpm_add_sub:65|addcore:adder|addcore:adder0|result_node1
- 100 G SOFT t 0 0 0 0 3 0 1 |fenpin10:30|lpm_add_sub:65|addcore:adder|addcore:adder0|result_node2
(69) 107 G SOFT t 0 0 0 0 4 0 1 |fenpin10:30|lpm_add_sub:65|addcore:adder|addcore:adder0|result_node3
- 108 G SOFT t 0 0 0 0 5 0 1 |fenpin10:30|lpm_add_sub:65|addcore:adder|addcore:adder0|result_node4
(64) 99 G SOFT t 0 0 0 0 6 0 1 |fenpin10:30|lpm_add_sub:65|addcore:adder|addcore:adder0|result_node5
- 102 G DFFE t 0 0 0 1 7 0 8 |fenpin10:30|count5 (|fenpin10:30|:56)
(67) 104 G DFFE t 0 0 0 1 7 0 9 |fenpin10:30|count4 (|fenpin10:30|:57)
(70) 109 G DFFE t 0 0 0 1 7 0 10 |fenpin10:30|count3 (|fenpin10:30|:58)
- 110 G DFFE t 0 0 0 1 7 0 11 |fenpin10:30|count2 (|fenpin10:30|:59)
- 111 G DFFE t 0 0 0 1 7 0 11 |fenpin10:30|count1 (|fenpin10:30|:60)
(71) 112 G TFFE t 0 0 0 1 5 0 12 |fenpin10:30|count0 (|fenpin10:30|:61)
- 106 G TFFE t 0 0 0 1 6 0 13 |fenpin10:30|:63
(4) 16 A SOFT t 0 0 0 0 2 0 1 |fenpin125:29|lpm_add_sub:73|addcore:adder|addcore:adder0|result_node1
- 87 F SOFT t 0 0 0 0 3 0 1 |fenpin125:29|lpm_add_sub:73|addcore:adder|addcore:adder0|result_node2
(58) 91 F SOFT t 0 0 0 0 4 0 1 |fenpin125:29|lpm_add_sub:73|addcore:adder|addcore:adder0|result_node3
(61) 94 F SOFT t 0 0 0 0 5 0 1 |fenpin125:29|lpm_add_sub:73|addcore:adder|addcore:adder0|result_node4
- 95 F SOFT t 0 0 0 0 6 0 1 |fenpin125:29|lpm_add_sub:73|addcore:adder|addcore:adder0|result_node5
(62) 96 F SOFT t 0 0 0 0 7 0 1 |fenpin125:29|lpm_add_sub:73|addcore:adder|addcore:adder0|result_node6
- 81 F DFFE t 0 0 0 0 7 0 9 |fenpin125:29|count6 (|fenpin125:29|:63)
- 92 F DFFE t 0 0 0 0 7 0 10 |fenpin125:29|count5 (|fenpin125:29|:64)
- 82 F DFFE t 0 0 0 0 7 0 11 |fenpin125:29|count4 (|fenpin125:29|:65)
- 84 F DFFE t 0 0 0 0 7 0 12 |fenpin125:29|count3 (|fenpin125:29|:66)
(57) 88 F DFFE t 0 0 0 0 7 0 13 |fenpin125:29|count2 (|fenpin125:29|:67)
- 89 F DFFE t 0 0 0 0 7 0 6 |fenpin125:29|count1 (|fenpin125:29|:68)
- 90 F TFFE t 0 0 0 0 7 0 7 |fenpin125:29|count0 (|fenpin125:29|:69)
(60) 93 F TFFE t 0 0 0 0 6 0 7 |fenpin125:29|:71
(12) 3 A SOFT t 0 0 0 0 2 0 1 |FEN30:55|LPM_ADD_SUB:74|addcore:adder|addcore:adder0|result_node1
- 15 A SOFT t 0 0 0 0 3 0 1 |FEN30:55|LPM_ADD_SUB:74|addcore:adder|addcore:adder0|result_node2
(11) 5 A SOFT t 0 0 0 0 4 0 1 |FEN30:55|LPM_ADD_SUB:74|addcore:adder|addcore:adder0|result_node3
- 1 A DFFE t 0 0 0 2 4 1 5 |FEN30:55|COUN3 (|FEN30:55|:5)
(5) 14 A DFFE t 0 0 0 2 4 1 6 |FEN30:55|COUN2 (|FEN30:55|:6)
- 7 A DFFE t 0 0 0 2 4 1 7 |FEN30:55|COUN1 (|FEN30:55|:7)
(10) 6 A TFFE t 0 0 0 2 3 0 3 |FEN30:55|COUN0 (|FEN30:55|:8)
- 76 E LCELL t 2 1 0 0 7 7 1 |74373-4:31|Q0 (|74373-4:31|:6)
- 79 E LCELL t 2 1 0 0 7 7 1 |74373-4:31|Q1 (|74373-4:31|:7)
(44) 65 E LCELL t 2 1 0 0 7 7 1 |74373-4:31|Q2 (|74373-4:31|:8)
- 66 E LCELL t 2 1 0 0 7 5 1 |74373-4:31|Q3 (|74373-4:31|:9)
Code:
s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
Device-Specific Information: d:\timer0331\7128slc-15\test0330.rpt
test0330
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'A':
Logic cells placed in LAB 'A'
+------------------------------- LC2 |add25:52|STATMACH:4|LPM_ADD_SUB:58|addcore:adder|addcore:adder0|result_node1
| +----------------------------- LC12 |add25:52|STATMACH:4|LPM_ADD_SUB:58|addcore:adder|addcore:adder0|result_node3
| | +--------------------------- LC13 |add25:52|STATMACH:4|:3
| | | +------------------------- LC4 |add25:52|STATMACH:4|COUN3
| | | | +----------------------- LC9 |add25:52|STATMACH:4|COUN2
| | | | | +--------------------- LC10 |add25:52|STATMACH:4|COUN1
| | | | | | +------------------- LC11 |add25:52|STATMACH:4|COUN0
| | | | | | | +----------------- LC16 |fenpin125:29|lpm_add_sub:73|addcore:adder|addcore:adder0|result_node1
| | | | | | | | +--------------- LC3 |FEN30:55|LPM_ADD_SUB:74|addcore:adder|addcore:adder0|result_node1
| | | | | | | | | +------------- LC15 |FEN30:55|LPM_ADD_SUB:74|addcore:adder|addcore:adder0|result_node2
| | | | | | | | | | +----------- LC5 |FEN30:55|LPM_ADD_SUB:74|addcore:adder|addcore:adder0|result_node3
| | | | | | | | | | | +--------- LC1 |FEN30:55|COUN3
| | | | | | | | | | | | +------- LC14 |FEN30:55|COUN2
| | | | | | | | | | | | | +----- LC7 |FEN30:55|COUN1
| | | | | | | | | | | | | | +--- LC6 |FEN30:55|COUN0
| | | | | | | | | | | | | | | +- LC8 LEDT
| | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | | | | | | that feed LAB 'A'
LC | | | | | | | | | | | | | | | | | A B C D E F G H | Logic cells that feed LAB 'A':
LC2 -> - - - - - * - - - - - - - - - - | * - - - - - - - | <-- |add25:52|STATMACH:4|LPM_ADD_SUB:58|addcore:adder|addcore:adder0|result_node1
LC12 -> - - - * - - - - - - - - - - - - | * - - - - - - - | <-- |add25:52|STATMACH:4|LPM_ADD_SUB:58|addcore:adder|addcore:adder0|result_node3
LC4 -> - * * * - * - - - - - - - - - - | * - - - * - - - | <-- |add25:52|STATMACH:4|COUN3
LC9 -> - * * * * * - - - - - - - - - - | * - - - * - - - | <-- |add25:52|STATMACH:4|COUN2
LC10 -> * * * * * * - - - - - - - - - - | * - - - * - - - | <-- |add25:52|STATMACH:4|COUN1
LC11 -> * * * * * * * - - - - - - - - - | * - - - * - - - | <-- |add25:52|STATMACH:4|COUN0
LC3 -> - - - - - - - - - - - - - * - - | * - - - - - - - | <-- |FEN30:55|LPM_ADD_SUB:74|addcore:adder|addcore:adder0|result_node1
LC15 -> - - - - - - - - - - - - * - - - | * - - - - - - - | <-- |FEN30:55|LPM_ADD_SUB:74|addcore:adder|addcore:adder0|result_node2
LC5 -> - - - - - - - - - - - * - - - - | * - - - - - - - | <-- |FEN30:55|LPM_ADD_SUB:74|addcore:adder|addcore:adder0|result_node3
LC1 -> - - - - - - - - - - * * * * * * | * - - - - - - - | <-- |FEN30:55|COUN3
LC14 -> - - - - - - - - - * * * * * * * | * - - - - - - - | <-- |FEN30:55|COUN2
LC7 -> - - - - - - - - * * * * * * * * | * - - - - - - - | <-- |FEN30:55|COUN1
LC6 -> - - - - - - - - * * * - - - * - | * - - - - - - - | <-- |FEN30:55|COUN0
LC8 -> - - * * * * * - - - - - - - - - | * - - - - - - - | <-- LEDT
Pin
5 -> - - - - - - - - - - - * * * * * | * - - - - - - - | <-- PULS
11 -> - - * * * * * - - - - * * * * * | * * * * - - * * | <-- START
LC106-> - - * * * * * - - - - - - - - - | * - - - - * - - | <-- |fenpin10:30|:63
LC89 -> - - - - - - - * - - - - - - - - | * - - - - * - - | <-- |fenpin125:29|count1
LC90 -> - - - - - - - * - - - - - - - - | * - - - - * - - | <-- |fenpin125:29|count0
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information: d:\timer0331\7128slc-15\test0330.rpt
test0330
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'B':
Logic cells placed in LAB 'B'
+------------------------------- LC19 |addr_chose:43|~155~1
| +----------------------------- LC31 |addr_chose:43|~292~1
| | +--------------------------- LC23 |addr_chose:43|~306~1
| | | +------------------------- LC25 |addr_chose:43|~307~1
| | | | +----------------------- LC24 |addr_chose:43|~308~1
| | | | | +--------------------- LC29 |addr_chose:43|~309~1
| | | | | | +------------------- LC30 |addr_chose:43|~310~1
| | | | | | | +----------------- LC28 |addr_chose:43|~311~1
| | | | | | | | +--------------- LC27 |addr_chose:43|~312~1
| | | | | | | | | +------------- LC32 |add25:52|STATMACH:9|LPM_ADD_SUB:58|addcore:adder|addcore:adder0|result_node1
| | | | | | | | | | +----------- LC22 |add25:52|STATMACH:9|COUN2
| | | | | | | | | | | +--------- LC21 |add25:52|STATMACH:9|COUN0
| | | | | | | | | | | | +------- LC26 |countled:28|lpm_add_sub:39|addcore:adder|addcore:adder0|result_node1
| | | | | | | | | | | | | +----- LC17 |countled:28|:36
| | | | | | | | | | | | | | +--- LC18 |countled:28|:37
| | | | | | | | | | | | | | | +- LC20 |countled:28|:38
| | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | | | | | | that feed LAB 'B'
LC | | | | | | | | | | | | | | | | | A B C D E F G H | Logic cells that feed LAB 'B':
LC31 -> - - * - - - - - - - - - - - - - | - * - - - - - - | <-- |addr_chose:43|~292~1
LC23 -> - * - - - - - - - - - - - - - - | - * * - - - - - | <-- |addr_chose:43|~306~1
LC21 -> - - - - - - - - - * * * - - - - | - * - - - - * * | <-- |add25:52|STATMACH:9|COUN0
LC26 -> - - - - - - - - - - - - - - * - | - * - - - - - - | <-- |countled:28|lpm_add_sub:39|addcore:adder|addcore:adder0|result_node1
LC17 -> * * * * * * * * * - - - - * * * | - * * * * - - * | <-- |countled:28|:36
LC18 -> * * * * * * * * * - - - * * * * | - * * * * - - * | <-- |countled:28|:37
LC20 -> * * * * * * * * * - - - * - - * | - * * * * - - * | <-- |countled:28|:38
Pin
11 -> - - - - - - - - - - * * - - - - | * * * * - - * * | <-- START
LC69 -> * - - - - - - - - - - - - - - - | - * - - - - - - | <-- |addr_chose:43|~163~1
LC74 -> - - - * - - - - - - - - - - - - | - * - - - - - - | <-- |addr_chose:43|~293~1
LC49 -> - - - - * - - - - - - - - - - - | - * - - - - - - | <-- |addr_chose:43|~294~1
LC58 -> - - - - - * - - - - - - - - - - | - * - - - - - - | <-- |addr_chose:43|~295~1
LC60 -> - - - - - - * - - - - - - - - - | - * - - - - - - | <-- |addr_chose:43|~296~1
LC55 -> - - - - - - - * - - - - - - - - | - * - - - - - - | <-- |addr_chose:43|~297~1
LC71 -> - - - - - - - - * - - - - - - - | - * - - - - - - | <-- |addr_chose:43|~298~1
LC34 -> * - - - - - - - - - - - - - - - | - * * - - - - - | <-- |add25:52|STATMACH:5|COUN1
LC52 -> * - - - - - - - - - - - - - - - | - * - * - - - - | <-- |add25:52|STATMACH:6|COUN1
LC127-> * - - - - - - - - - - - - - - - | - * - - - - - * | <-- |add25:52|STATMACH:7|COUN1
LC123-> - - - - - - - - - - * * - - - - | - * - - - - * - | <-- |add25:52|STATMACH:8|:3
LC113-> * - - - - - - - - - - - - - - - | - * - - - - - * | <-- |add25:52|STATMACH:8|COUN1
LC97 -> * - - - - - - - - * * - - - - - | - * - - - - * - | <-- |add25:52|STATMACH:9|COUN1
LC46 -> * - - - - - - - - - - - - - - - | - * * - - - - - | <-- |add25:52|STATMACH:10|COUN1
LC54 -> - - - - - - - - - - - - - * - - | - * - - - - - - | <-- |countled:28|lpm_add_sub:39|addcore:adder|addcore:adder0|result_node2
LC93 -> - - - - - - - - - - - - - * * * | - * - - * - - - | <-- |fenpin125:29|:71
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information: d:\timer0331\7128slc-15\test0330.rpt
test0330
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'C':
Logic cells placed in LAB 'C'
+------------------------------- LC33 |addr_chose:43|~153~1
| +----------------------------- LC43 |add25:52|STATMACH:5|LPM_ADD_SUB:58|addcore:adder|addcore:adder0|result_node1
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