tkdev_timer.h

使用广泛的日本著名的开源嵌入式实时操作系统T-Kernel的源码

/*
 *----------------------------------------------------------------------
 *    T-Kernel
 *
 *    Copyright (C) 2004-2006 by Ken Sakamura. All rights reserved.
 *    T-Kernel is distributed under the T-License.
 *----------------------------------------------------------------------
 *
 *    Version:   1.02.02
 *    Released by T-Engine Forum(http://www.t-engine.org) at 2006/8/9.
 *
 *----------------------------------------------------------------------
 */

/*
 *	tkdev_timer.h (M32104)
 *	Hardware-Dependent Timer Processing
 */

#ifndef _TKDEV_TIMER_
#define _TKDEV_TIMER_

#include <tk/syslib.h>
#include <sys/sysinfo.h>
#include "tkdev_conf.h"

/*
 * Settable interval range (millisecond)
 */
#define MIN_TIMER_PERIOD	1
#define MAX_TIMER_PERIOD	50

/*
 * Mode register setting value
 *	TSEL =1	Output timer mode
 *	CCSEL=1	Use constant frequency clock (FCLK)
 *	TCSEL=0	Unlimited terminal count number
 *	TCCR =0	Count down limit value 0
 *	TOSEL=0	No timer output
 *	GTSEL=0	No gate/trigger input
 *	CMSEL=0	Count down
 */
#define MFTMOD_INIT	( MFTMOD_TSEL | MFTMOD_CCSEL )

IMPORT UW	TimerClkDiv;	/* Dividing rate of timer clock */

/*
 * Set timer
 */
Inline void init_hw_timer( void )
{
	UW	n, mod;

	/* Stop timer */
	out_w(MFTCR, MFTCR_DIS(0));

	/* Determine dividing rate */
	n = (UW)TIMER_PERIOD * (UW)SCInfo.Fclk * 1000 / 65536;
	mod = ( n < 8  )? (TimerClkDiv = 8,   MFTMOD_CSSEL(1)): /*   8 dividing */
	      ( n < 32 )? (TimerClkDiv = 32,  MFTMOD_CSSEL(2)): /*  32 dividing */
	                  (TimerClkDiv = 128, MFTMOD_CSSEL(3)); /* 128 dividing */

	/* Set timer mode */
	out_w(MFT0MOD, MFTMOD_INIT | mod);

	/* Set counter */
	n = (UW)TIMER_PERIOD * (UW)SCInfo.Fclk * 1000 / TimerClkDiv - 1;
	out_w(MFT0CUT, n);

	/* Start timer count */
	out_w(MFTCR, MFTCR_ENA(0));
}

/*
 * Timer start processing
 *	Initialize the timer and start the periodical timer interrupt.
 */
Inline void start_hw_timer( void )
{
IMPORT	void	timer_handler_startup( void );

	/* Set timer */
	init_hw_timer();

	/* Interrupt handler definition */
	define_inthdr(VECNO_MFT0, timer_handler_startup);

	/* Timer interrupt enable */
	SetIntMode(VECNO_MFT0, 0);
	EnableInt(VECNO_MFT0, TIMER_INTLEVEL);
}

/*
 * Clear timer interrupt
 *	Clear the timer interrupt request. Depending on the
 *	type of hardware, 
 *	there are two timings for clearing: at the beginning and
 *	the end of the interrupt handler.
 *	'clear_hw_timer_interrupt()' is called at the beginning
 *	of the timer interrupt handler.
 *	'end_of_hw_timer_interrupt()' is called at the end of the
 *	timer interrupt handler.
 *	Use either or both according to hardware.
 */
Inline void clear_hw_timer_interrupt( void )
{
	/* Nothing required to do at this point */
}
Inline void end_of_hw_timer_interrupt( void )
{
	/* Nothing required to do at this point */
}

/*
 * Timer stop processing
 *	Stop the timer operation.
 *	Called when system stops.
 */
Inline void terminate_hw_timer( void )
{
	/* Timer interrupt disable */
	DisableInt(VECNO_MFT0);

	/* Stop timer */
	out_w(MFTCR, MFTCR_DIS(0));
}

/*
 * Get processing time from the previous timer interrupt to the
 * current (nanosecond)
 *	Consider the possibility that the timer interrupt occurred
 *	during the interrupt disable and calculate the processing
 *	time within the following
 *	range: 0 <= Processing time < TIMER_PERIOD * 2
 */
Inline UINT get_hw_timer_nsec( void )
{
	UW	ofs, max;
	BOOL	unf;

	max = in_w(MFT0RLD) + 1;
	do {
		unf = CheckInt(VECNO_MFT0);
		ofs = max - in_w(MFT0CUT);
	} while ( unf != CheckInt(VECNO_MFT0) );
	if ( unf ) {
		ofs += max;
	}

	return ofs * (1000 * TimerClkDiv) / SCInfo.Fclk;
}

#endif /* _TKDEV_TIMER_ */