serial_yuanlin.c

ccs3.1 omap5910 platform

/***************************************************
公司:      好易通科技有限公司
产品名:    数字对讲机
CPU:       OMAP5910
串口:      模式1, 8位数据, 无校验位, 波特率9600
           中断发送和接收, 无帧校验, 1位停止位
作者:      袁林
编写时间:  2004.12.22
修改时间：
****************************************************/
#include "type.h"
#include "serial.h"

/*********************************************
功能: 串口初始化处理
**********************************************/
INT32 UART1_Init(void)
{
    struct UART_struct *pUART1 = (struct UART_struct*)UART1_BASE_ADDR;  /*强制类型转换为Struct UART_struct型*/
//    int i;

    /* The default TIPB configuration(RHSW_ARM_CNF) seems enough to operate normally.
       Default is enough for 60MHz MPU operation. 100MHz is now tested.  */

    /* PLS refer OMAP5910 technical reference B on page 12-51. */
    /* MCR[7:5], FCR[5:4], and IER[7:4] can only be written when EFR[4] = 1.
       Transmission control register (TCR) and trigger level register (TLR) 
       are accessible only when EFR[4] = 1 and MCR[6] = 1. */
    pUART1->LCR = 0xbf;           /* EFR register is accessible only when LCR = 0xbf */
    pUART1->IIR_FCR_EFR &= 0x3f;  /* Disable auto-RTS1 and auto-CTS1  */
    pUART1->IIR_FCR_EFR |= 0x10;  /* set EFR[4] to 1-->Enable write IER[7:4] and FCR[5:4] and MCR[7:5] */
    /* pUART1->IIR_FCR_EFR |= 1<<4|1<<6|1<<7; bit6 Enable auto-nRTS and bit7 enable auto-nCTS. */
    

    pUART1->LCR  = 0x80;          /* MCR[7:5] register is accessible when LCR[7] = 1 and LCR[7:0] ≠ 0xbf */
    pUART1->MCR |= 0x40;          /* MCR[6] = 1 enables access to the TCR and TLR registers */

    /*pUART1->IIR_FCR_EFR |= 1; */
    pUART1->SCR |= 0x40;          /* SCR[6] = 1 enables the granularity of 1 for trigger TX level */
    pUART1->SPR_TLR = 0x11;       /* Receive FIFO trigger level and Transmit FIFO trigger level are both 1. */
    pUART1->IIR_FCR_EFR &= 0x0f;  /* FCR[7:4] sets the trigger any value level for the RX FIFO and the TX FIFO .
                                     But not first set SCR[6] = 1, then set TLR and FCR, last set SCR[6] = 1? */

    pUART1->MSR_TCR = 0x0f;       /* The transmission control register is written. 100% empty and full.
                                     MSR is only read.  */
    /*pUART1->SPR_TLR = 0x22;      8 and 8. */
    /* pUART1->IIR_FCR_EFR = ...; */
    pUART1->LCR = 0xbf;           /* access EFR */
    pUART1->IIR_FCR_EFR &= 0xef;  /* EFR[4] = 0 */
    pUART1->LCR &= 0x7f;          /* access MCR */
    pUART1->MCR &= 0xbf;          /* Disables access to the TCR and TLR registers */

    pUART1->LCR = 0x03;           /* 8 bits; 1 stop bit; No parity; */
    /*pUART1->LCR = 0x03<<0|0x00<<1|0x00<<3;  8 bits; 1 stop bit; No parity; */
    pUART1->LCR |= 0x80;          /* LCR[7] = 1, access DLL register */
    /*pUART1->OSC_12M_SEL |= 1<<0;    115200bps */
    pUART1->RHR_THR_DLL = 0x4e;   /* baud clock divisor,Divisor value = Operating Frequency / (16 x Baud Rate) */
    //pUART1->RHR_THR_DLL = 0x6;   /* Baud Rate: 115200 ---wzh modified*/
    
    pUART1->IER_DLH = 0;	      /* Set baud rate to 9600. */
    pUART1->LCR &= 0x7f;
    /* pUART1->IER_DLH |= 1<<0|1<<1;  Enable the RHR and THR interrupts. */

    pUART1->MDR1 = 0x00;          /* Enable UART1 without autobauding. */

    return 0;
}


INT32 ReadUART1(unsigned char* buffer, u32 length) 
{
	struct UART_struct *pUART1 = (struct UART_struct*)UART1_BASE_ADDR; 
	
	while(length--) 
	{
		while( !(pUART1->LSR & 0x01) ) /*Polling Read Interrupt * added by Henry Zhang*/
		{
		}
   		*buffer++ = pUART1->RHR_THR_DLL;
	}
	return 0;
}

INT32 WriteUART1(unsigned char* buffer, u32 length) 
{
	struct UART_struct *pUART1 = (struct UART_struct*)UART1_BASE_ADDR; 

	while(length--) 
	{
		while( !(pUART1->LSR & (0x01<<5)) )
		{
		}
   		pUART1->RHR_THR_DLL = *buffer++;
	}
	return 0;
}


/********** 串口测试 *********/
void SerialTest(void)
{
    int i = 0;
    unsigned char buf[8];//={'5','5','a','a','0','0','f','f'};	
    unsigned char status; 
    struct UART_struct *pUART1 = (struct UART_struct*)UART1_BASE_ADDR;  
    printf("\nProcess UART1 R/W...\n");
  
    UART1_Init();        /* serial initialization */

    pUART1->LCR &= ~(1<<7);	// Enable the RHR and THR interrupts
    
    status = pUART1->LSR;
    	
	while(1)
	{
	    while(status == pUART1->LSR)
		{
		    /*wait for LSR changing */
		}
		
		printf("IIR: 0x%02x\n", pUART1->IIR_FCR_EFR);
		status = pUART1->LSR;
		printf("LSR: 0x%02x\n", pUART1->LSR);
		
		//WriteUART1(buf,8);
		
		if(status & 0x20)  //RX_FIFO full
		{
		    pUART1->IER_DLH &= ~(1<<1); // Disable THR interrupts.             /*??????????*/
		}
		if(status & 0x01)  //At least one data character in the RX_FIFO
		{		
		    ReadUART1(buf, 4);
		    for(i=0; i<4; i++)
		    {
		        printf("read out buf[i]: %x\n", buf[i]);
		    }
		    WriteUART1(buf, 4);                                               /*??????????*/
				
		}
	}
  
}