my_serial.c

ccs3.1 omap5910 platform

/******************************************************************************** 
* Copyright (C), 2000-2005, HYT Tech. Co., Ltd. 
*
*FileName:      my_serial.c 
*
*Author: Wang Zhaohui         Version :1.0            Date:05/09/12 
*
*Description: To test data transfer using UART.  
*  
*Version: no other discription
*
*Function List:         
*        UART1_Init
*        DataRx
*        DataTx
*        SerialTest
*History:                
*   <author>  <time>   <version >   <desc> 
*    WZH     05/08/24     1.0       build this moudle  
*    WZH     05/10/13     1.0       modified
********************************************************************************/

#include "type.h"
#include "serial.h"
#include "string.h"


INT32 UART1_Init(void)
{
    struct UART_struct *pUART1 = (struct UART_struct*)UART1_BASE_ADDR;

    /* The default TIPB configuration(RHSW_ARM_CNF) seems enough to operate normally.
       Default is enough for 60MHz MPU operation. 100MHz is now tested.  */

    /* PLS refer OMAP5910 technical reference B on page 12-51. */
    /* MCR[7:5], FCR[5:4], and IER[7:4] can only be written when EFR[4] = 1.
       Transmission control register (TCR) and trigger level register (TLR) 
       are accessible only when EFR[4] = 1 and MCR[6] = 1. */
    pUART1->LCR = 0xbf;           /* EFR register is accessible only when LCR = 0xbf */
    pUART1->IIR_FCR_EFR &= 0x3f;  /* Disable auto-RTS1 and auto-CTS1  */
    pUART1->IIR_FCR_EFR |= 0x10;  /* set EFR[4] to 1-->Enable write IER[7:4] and FCR[5:4] and MCR[7:5] */
    /* pUART1->IIR_FCR_EFR |= 1<<4|1<<6|1<<7; bit6 Enable auto-nRTS and bit7 enable auto-nCTS. */
    

    pUART1->LCR  = 0x80;          /* MCR[7:5] register is accessible when LCR[7] = 1 and LCR[7:0] ≠ 0xbf */
    pUART1->MCR |= 0x40;          /* MCR[6] = 1 enables access to the TCR and TLR registers */

    /*pUART1->IIR_FCR_EFR |= 1; */
    pUART1->SCR |= 0x40;          /* SCR[6] = 1 enables the granularity of 1 for trigger TX level */
    pUART1->SPR_TLR = 0x11;       /* Receive FIFO trigger level and Transmit FIFO trigger level are both 1. */
    pUART1->IIR_FCR_EFR &= 0x0f;  /* FCR[7:4] sets the trigger any value level for the RX FIFO and the TX FIFO .
                                     But not first set SCR[6] = 1, then set TLR and FCR, last set SCR[6] = 1? */

    pUART1->MSR_TCR = 0x0f;       /* The transmission control register is written. 100% empty and full.
                                     MSR is only read.  */
    /*pUART1->SPR_TLR = 0x22;      8 and 8. */
    /* pUART1->IIR_FCR_EFR = ...; */
    pUART1->LCR = 0xbf;           /* access EFR */
    pUART1->IIR_FCR_EFR &= 0xef;  /* EFR[4] = 0 */
    pUART1->LCR &= 0x7f;          /* access MCR */
    pUART1->MCR &= 0xbf;          /* Disables access to the TCR and TLR registers */

    pUART1->LCR = 0x03;           /* 8 bits; 1 stop bit; No parity; */
    /*pUART1->LCR = 0x03<<0|0x00<<1|0x00<<3;  8 bits; 1 stop bit; No parity; */
    pUART1->LCR |= 0x80;          /* LCR[7] = 1, access DLL register */
    /*pUART1->OSC_12M_SEL |= 1<<0;    115200bps */
    pUART1->RHR_THR_DLL = 0x4e;   /* baud clock divisor,Divisor value = Operating Frequency / (16 x Baud Rate) */
    pUART1->IER_DLH = 0;	      /* Set baud rate to 9600. */
    pUART1->LCR &= 0x7f;
    /* pUART1->IER_DLH |= 1<<0|1<<1;  Enable the RHR and THR interrupts. */

    pUART1->MDR1 = 0x00;          /* Enable UART1 without autobauding. */

    return 0;
}

char DataRx(void)
{
    char tmp;
    
	struct UART_struct *pUART1 = (struct UART_struct*)UART1_BASE_ADDR; 
	
	while(!(pUART1->LSR & 0x01))
	{
	    //wait until At least one data character in the RX_FIFO
	}
	
	tmp = pUART1->RHR_THR_DLL;
	
	return tmp;
}

void DataTx(int data)
{
    struct UART_struct *pUART1 = (struct UART_struct*)UART1_BASE_ADDR;
    
    if('\n' == data)
    {
        while(!(pUART1->LSR & (0x1 << 5)))
        {
            //Wait until Transmit hold register is empty.
        }
        
        Delay(6000);   //because the response of terminal is not on time 
        pUART1->RHR_THR_DLL = ' ';
        pUART1->RHR_THR_DLL = 'T'; 
        pUART1->RHR_THR_DLL = 'h'; 
        pUART1->RHR_THR_DLL = 'e';  
        pUART1->RHR_THR_DLL = ' ';    
        pUART1->RHR_THR_DLL = 'e'; 
        pUART1->RHR_THR_DLL = 'n'; 
        pUART1->RHR_THR_DLL = 'd'; 
        pUART1->RHR_THR_DLL = '!';                             
    }
    else
    {
        while(!(pUART1->LSR & (0x1 << 5)))
        {
            //Wait until Transmit hold register is empty.
        }
        
        Delay(6000);
        pUART1->RHR_THR_DLL = data; 
    }
}

void SerialTest(void)
{
    int data = 0;
    struct UART_struct *pUART1 = (struct UART_struct*)UART1_BASE_ADDR;
    
    printf("\n---Please open the serial debug tool and configue it as below:\n");
    printf("Serial port:COM1\nBaud rate:9600\nNo parity\nDatalength:8\n1 stop bit\n");

    UART1_Init();
    pUART1->LCR &= ~(1<<7);	// Enable the RHR and THR 最高位置0
    
    while(!(pUART1->LSR &= 0x1))
	{
    //wait if No data in the receive FIFO 此处改为对LSR最后一位进行判断，消除了bug！！！
	}
    
    do
    {
        data = DataRx();
        printf("The ASCII value of the data received from serial debug is: %d\n", data);
        Delay(6000);
        
        DataTx(data);
    }
    while(1);    //while(data != '\n');
   
}