📄 tm-ns32k.h
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/* Nonzero if X is a hard reg that can be used as an index. */#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))/* Nonzero if X is a hard reg that can be used as a base reg. */#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))#endif/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a valid memory address for an instruction. The MODE argument is the machine mode for the MEM expression that wants to use this address. The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. *//* 1 if X is an address that we could indirect through. *//***** NOTE ***** There is a bug in the Sequent assembler which fails to fixup addressing information for symbols used as offsets from registers which are not FP or SP (or SB or PC). This makes _x(fp) valid, while _x(r0) is invalid. */#define INDIRECTABLE_1_ADDRESS_P(X) \ (CONSTANT_P (X) \ || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ || (GET_CODE (X) == PLUS \ && GET_CODE (XEXP (X, 0)) == REG \ && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ && CONSTANT_ADDRESS_P (XEXP (X, 1))))#define MEM_REG(X) \ ((GET_CODE (X) == REG && (REGNO (X) ^ 16) < 2) \ || (GET_CODE (X) == SYMBOL_REF))#define INDIRECTABLE_2_ADDRESS_P(X) \ (GET_CODE (X) == MEM \ && (((xfoo0 = XEXP (X, 0), MEM_REG (xfoo0)) \ || (GET_CODE (xfoo0) == PLUS \ && GET_CODE (XEXP (xfoo0, 0)) == REG \ && MEM_REG (XEXP (xfoo0, 0)) \ && CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfoo0, 1)))) \ || CONSTANT_ADDRESS_P (xfoo0)))#define INDIRECTABLE_ADDRESS_P(X) \ (INDIRECTABLE_1_ADDRESS_P(X) \ || INDIRECTABLE_2_ADDRESS_P (X) \ || (GET_CODE (X) == PLUS \ && CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1)) \ && INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0))))/* Go to ADDR if X is a valid address not using indexing. (This much is the easy part.) */#define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \{ register rtx xfoob = (X); \ if (GET_CODE (xfoob) == REG) goto ADDR; \ if (INDIRECTABLE_1_ADDRESS_P(X)) goto ADDR; \ if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \ if (GET_CODE (X) == PLUS) \ if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1))) \ if (INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0))) \ goto ADDR; \}/* 1 if PROD is either a reg times size of mode MODE or just a reg, if MODE is just one byte. Actually, on the ns32k, since the index mode is independent of the operand size, we can match more stuff... This macro's expansion uses the temporary variables xfoo0, xfoo1 and xfoo2 that must be declared in the surrounding context. */#define INDEX_TERM_P(PROD, MODE) \((GET_CODE (PROD) == REG && REG_OK_FOR_INDEX_P (PROD)) \ || (GET_CODE (PROD) == MULT \ && (xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \ (GET_CODE (xfoo1) == CONST_INT \ && GET_CODE (xfoo0) == REG \ && FITS_INDEX_RANGE (INTVAL (xfoo1)) \ && REG_OK_FOR_INDEX_P (xfoo0)))))#define FITS_INDEX_RANGE(X) \ ((xfoo2 = (unsigned)(X)-1), \ ((xfoo2 < 4 && xfoo2 != 2) || xfoo2 == 7))#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \{ register rtx xfooy, xfooz, xfoo0, xfoo1; \ unsigned xfoo2; \ xfooy = X; \ GO_IF_NONINDEXED_ADDRESS (xfooy, ADDR); \ if (GET_CODE (xfooy) == PLUS) \ { \ if (GET_CODE (XEXP (xfooy, 1)) == CONST_INT \ && GET_CODE (XEXP (xfooy, 0)) == PLUS) \ xfooy = XEXP (xfooy, 0); \ else if (GET_CODE (XEXP (xfooy, 0)) == CONST_INT \ && GET_CODE (XEXP (xfooy, 1)) == PLUS) \ xfooy = XEXP (xfooy, 1); \ xfooz = XEXP (xfooy, 1); \ if (INDEX_TERM_P (xfooz, MODE)) \ { rtx t = XEXP (xfooy, 0); GO_IF_NONINDEXED_ADDRESS (t, ADDR); }\ xfooz = XEXP (xfooy, 0); \ if (INDEX_TERM_P (xfooz, MODE)) \ { rtx t = XEXP (xfooy, 1); GO_IF_NONINDEXED_ADDRESS (t, ADDR); }\ } \ else if (INDEX_TERM_P (xfooy, MODE)) \ goto ADDR; \ else if (GET_CODE (xfooy) == PRE_DEC) \ if (REGNO (XEXP (xfooy, 0)) == STACK_POINTER_REGNUM) goto ADDR; \ else abort (); \}/* Try machine-dependent ways of modifying an illegitimate address to be legitimate. If we find one, return the new, valid address. This macro is used in only one place: `memory_address' in explow.c. OLDX is the address as it was before break_out_memory_refs was called. In some cases it is useful to look at this to decide what needs to be done. MODE and WIN are passed so that this macro can use GO_IF_LEGITIMATE_ADDRESS. It is always safe for this macro to do nothing. It exists to recognize opportunities to optimize the output. For the ns32k, we do nothing */#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}/* Go to LABEL if ADDR (a legitimate address expression) has an effect that depends on the machine mode it is used for. On the ns32k, only predecrement and postincrement address depend thus (the amount of decrement or increment being the length of the operand). */#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \ goto LABEL;}/* Specify the machine mode that this machine uses for the index in the tablejump instruction. Can do SImode, but HI mode is more efficient. */#define CASE_VECTOR_MODE HImode/* Define this if the tablejump instruction expects the table to contain offsets from the address of the table. Do not define this if the table should contain absolute addresses. */#define CASE_VECTOR_PC_RELATIVE/* Specify the tree operation to be used to convert reals to integers. */#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR/* This is the kind of divide that is easiest to do in the general case. */#define EASY_DIV_EXPR TRUNC_DIV_EXPR/* Define this as 1 if `char' should by default be signed; else as 0. */#define DEFAULT_SIGNED_CHAR 1/* Max number of bytes we can move from memory to memory in one reasonably fast instruction. */#define MOVE_MAX 4/* Define this if zero-extension is slow (more than one real instruction). *//* #define SLOW_ZERO_EXTEND *//* Nonzero if access to memory by bytes is slow and undesirable. */#define SLOW_BYTE_ACCESS 0/* Define if shifts truncate the shift count which implies one can omit a sign-extension or zero-extension of a shift count. *//* #define SHIFT_COUNT_TRUNCATED *//* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1/* We assume that the store-condition-codes instructions store 0 for false and some other value for true. This is the value stored for true. */#define STORE_FLAG_VALUE 1/* Specify the machine mode that pointers have. After generation of rtl, the compiler makes no further distinction between pointers and any other objects of this machine mode. */#define Pmode SImode/* A function address in a call instruction is a byte address (for indexing purposes) so give the MEM rtx a byte's mode. */#define FUNCTION_MODE QImode/* Compute the cost of computing a constant rtl expression RTX whose rtx-code is CODE. The body of this macro is a portion of a switch statement. If the code is computed here, return it with a return statement. Otherwise, break from the switch. */#define CONST_COSTS(RTX,CODE) \ case CONST_INT: \ if (INTVAL (RTX) <= 7 && INTVAL (RTX) >= -8) return 0; \ if (INTVAL (RTX) < 0x4000 && INTVAL (RTX) >= -0x4000) \ return 1; \ case CONST: \ case LABEL_REF: \ case SYMBOL_REF: \ return 3; \ case CONST_DOUBLE: \ return 5;/* Tell final.c how to eliminate redundant test instructions. *//* Here we define machine-dependent flags and fields in cc_status (see `conditions.h'). *//* This bit means that what ought to be in the Z bit should be tested in the F bit. */#define CC_Z_IN_F 04000/* This bit means that what ought to be in the Z bit is complemented in the F bit. */#define CC_Z_IN_NOT_F 010000/* Store in cc_status the expressions that the condition codes will describe after execution of an instruction whose pattern is EXP. Do not alter them if the instruction would not alter the cc's. */#define NOTICE_UPDATE_CC(EXP, INSN) \{ if (GET_CODE (EXP) == SET) \ { if (GET_CODE (SET_DEST (EXP)) == CC0) \ { cc_status.flags = 0; \ cc_status.value1 = SET_DEST (EXP); \ cc_status.value2 = SET_SRC (EXP); \ } \ else if (GET_CODE (SET_SRC (EXP)) == CALL) \ { CC_STATUS_INIT; } \ else if (GET_CODE (SET_DEST (EXP)) == REG) \ { if (cc_status.value1 \ && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \ cc_status.value1 = 0; \ if (cc_status.value2 \ && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \ cc_status.value2 = 0; \ } \ else if (GET_CODE (SET_DEST (EXP)) == MEM) \ { CC_STATUS_INIT; } \ } \ else if (GET_CODE (EXP) == PARALLEL \ && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \ { if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == CC0) \ { cc_status.flags = 0; \ cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \ cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \ } \ else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == REG) \ { if (cc_status.value1 \ && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value1)) \ cc_status.value1 = 0; \ if (cc_status.value2 \ && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value2)) \ cc_status.value2 = 0; \ } \ else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == MEM) \ { CC_STATUS_INIT; } \ } \ else if (GET_CODE (EXP) == CALL) \ { /* all bets are off */ CC_STATUS_INIT; } \ else { /* nothing happens? CC_STATUS_INIT; */} \ if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \ && cc_status.value2 \ && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \ printf ("here!\n", cc_status.value2 = 0); \}#define OUTPUT_JUMP(NORMAL, NO_OV) \{ if (cc_status.flags & CC_NO_OVERFLOW) \ return NO_OV; \ return NORMAL; }/* Control the assembler format that we output. *//* Output at beginning of assembler file. */#define ASM_FILE_START(FILE) fprintf (FILE, "#NO_APP\n");/* Output to assembler file text saying following lines may contain character constants, extra white space, comments, etc. */#define ASM_APP_ON "#APP\n"/* Output to assembler file text saying following lines no longer contain unusual constructs. */#define ASM_APP_OFF "#NO_APP\n"/* Output before read-only data. */#define TEXT_SECTION_ASM_OP ".text"/* Output before writable data. */#define DATA_SECTION_ASM_OP ".data"/* How to refer to registers in assembler output. This sequence is indexed by compiler's hard-register-number (see above). */#define REGISTER_NAMES \{"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ "fp", "sp"}/* How to renumber registers for dbx and gdb. NS32000 may need more change in the numeration. */#define DBX_REGISTER_NUMBER(REGNO) ((REGNO < 8) ? (REGNO)+4 : (REGNO))/* This is how to output the definition of a user-level label named NAME, such as the label on a static function or variable NAME. */#define ASM_OUTPUT_LABEL(FILE,NAME) \ do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)/* This is how to output a command to make the user-level label named NAME defined for reference from other files. */#define ASM_GLOBALIZE_LABEL(FILE,NAME) \ do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)/* This is how to output a reference to a user-level label named NAME. `assemble_name' uses this. */#define ASM_OUTPUT_LABELREF(FILE,NAME) \ fprintf (FILE, "_%s", NAME)/* This is how to output an internal numbered label where PREFIX is the class of label and NUM is the number within the class. */#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ fprintf (FILE, "%s%d:\n", PREFIX, NUM)/* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. This is suitable for output with `assemble_name'. */#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ sprintf (LABEL, "*%s%d", PREFIX, NUM)/* This is how to align the code that follows an unconditional branch. */#define ASM_OUTPUT_ALIGN_CODE(FILE) \ fprintf (FILE, "\t.align 4\n")/* This is how to output an assembler line defining a `double' constant. */#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))/* This is how to output an assembler line defining a `float' constant. */#define ASM_OUTPUT_FLOAT(FILE,VALUE) \ fprintf (FILE, "\t.float 0f%.20e\n", (VALUE))/* This is how to output an assembler line defining an `int' constant. */#define ASM_OUTPUT_INT(FILE,VALUE) \( fprintf (FILE, "\t.long "), \ output_addr_const (FILE, (VALUE)), \ fprintf (FILE, "\n"))
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