📄 i386.md
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"" "*{ if (REG_P (operands[2])) return AS2 (ror%W0,%%cl,%0); else return AS2 (ror%W0,%2,%1);}")(define_insn "rotrqi3" [(set (match_operand:QI 0 "general_operand" "=qm") (rotatert:QI (match_operand:QI 1 "general_operand" "0") (match_operand:QI 2 "general_operand" "cI")))] "" "*{ if (REG_P (operands[2])) return AS2 (ror%B0,%%cl,%0); else return AS2 (ror%B0,%2,%1);}");; Store-flag instructions.;; These clear the cc_status because the output register;; might be the same register previously tested.(define_insn "seq" [(set (match_operand:QI 0 "general_operand" "=q") (eq (cc0) (const_int 0)))] "" "* CC_STATUS_INIT; return \"sete %0\";")(define_insn "sne" [(set (match_operand:QI 0 "general_operand" "=q") (ne (cc0) (const_int 0)))] "" "* CC_STATUS_INIT; return \"setne %0\";")(define_insn "sgt" [(set (match_operand:QI 0 "general_operand" "=q") (gt (cc0) (const_int 0)))] "" "* CC_STATUS_INIT; OUTPUT_JUMP (\"setg %0\", \"seta %0\", 0);")(define_insn "sgtu" [(set (match_operand:QI 0 "general_operand" "=q") (gtu (cc0) (const_int 0)))] "" "* CC_STATUS_INIT; return \"seta %0\"; ")(define_insn "slt" [(set (match_operand:QI 0 "general_operand" "=q") (lt (cc0) (const_int 0)))] "" "* CC_STATUS_INIT; OUTPUT_JUMP (\"setl %0\", \"setb %0\", \"sets %0\"); ")(define_insn "sltu" [(set (match_operand:QI 0 "general_operand" "=q") (ltu (cc0) (const_int 0)))] "" "* CC_STATUS_INIT; return \"setb %0\"; ")(define_insn "sge" [(set (match_operand:QI 0 "general_operand" "=q") (ge (cc0) (const_int 0)))] "" "* CC_STATUS_INIT; OUTPUT_JUMP (\"setge %0\", \"setae %0\", \"setns %0\"); ")(define_insn "sgeu" [(set (match_operand:QI 0 "general_operand" "=q") (geu (cc0) (const_int 0)))] "" "* CC_STATUS_INIT; return \"setae %0\"; ")(define_insn "sle" [(set (match_operand:QI 0 "general_operand" "=q") (le (cc0) (const_int 0)))] "" "* CC_STATUS_INIT; OUTPUT_JUMP (\"setle %0\", \"setbe %0\", 0);")(define_insn "sleu" [(set (match_operand:QI 0 "general_operand" "=q") (leu (cc0) (const_int 0)))] "" "* CC_STATUS_INIT; return \"setbe %0\"; ");; Basic conditional jump instructions.;; We ignore the overflow flag for signed branch instructions.(define_insn "beq" [(set (pc) (if_then_else (eq (cc0) (const_int 0)) (label_ref (match_operand 0 "" "")) (pc)))] "" "je %l0")(define_insn "bne" [(set (pc) (if_then_else (ne (cc0) (const_int 0)) (label_ref (match_operand 0 "" "")) (pc)))] "" "jne %l0")(define_insn "bgt" [(set (pc) (if_then_else (gt (cc0) (const_int 0)) (label_ref (match_operand 0 "" "")) (pc)))] "" "*OUTPUT_JUMP (\"jg %l0\", \"ja %l0\", 0)")(define_insn "bgtu" [(set (pc) (if_then_else (gtu (cc0) (const_int 0)) (label_ref (match_operand 0 "" "")) (pc)))] "" "ja %l0");; There is no jump insn to check for `<' on IEEE floats.;; Page 17-80 in the 80387 manual says jb, but that's wrong;;; jb checks for `not >='. So swap the operands and do `>'.(define_expand "blt" [(set (pc) (if_then_else (lt (cc0) (const_int 0)) (label_ref (match_operand 0 "" "")) (pc)))] "" "{ extern rtx sequence_stack; rtx prev = XEXP (XEXP (sequence_stack, 1), 0); rtx body = PATTERN (prev); rtx comp; if (GET_CODE (body) == SET) comp = SET_SRC (body); else comp = SET_SRC (XVECEXP (body, 0, 0)); if (GET_CODE (comp) == COMPARE ? GET_MODE_CLASS (GET_MODE (XEXP (comp, 0))) == MODE_FLOAT : GET_MODE_CLASS (GET_MODE (comp)) == MODE_FLOAT) { if (GET_CODE (comp) == COMPARE) { rtx op0 = XEXP (comp, 0); rtx op1 = XEXP (comp, 1); XEXP (comp, 0) = op1; XEXP (comp, 1) = op0; } else { rtx new = gen_rtx (COMPARE, VOIDmode, CONST0_RTX (GET_MODE (comp)), comp); if (GET_CODE (body) == SET) SET_SRC (body) = new; else SET_SRC (XVECEXP (body, 0, 0)) = new; } emit_insn (gen_bgt (operands[0])); DONE; }}")(define_insn "" [(set (pc) (if_then_else (lt (cc0) (const_int 0)) (label_ref (match_operand 0 "" "")) (pc)))] "" "*OUTPUT_JUMP (\"jl %l0\", \"jb %l0\", \"js %l0\")")(define_insn "bltu" [(set (pc) (if_then_else (ltu (cc0) (const_int 0)) (label_ref (match_operand 0 "" "")) (pc)))] "" "jb %l0")(define_insn "bge" [(set (pc) (if_then_else (ge (cc0) (const_int 0)) (label_ref (match_operand 0 "" "")) (pc)))] "" "*OUTPUT_JUMP (\"jge %l0\", \"jae %l0\", \"jns %l0\")")(define_insn "bgeu" [(set (pc) (if_then_else (geu (cc0) (const_int 0)) (label_ref (match_operand 0 "" "")) (pc)))] "" "jae %l0");; See comment on `blt', above.(define_expand "ble" [(set (pc) (if_then_else (le (cc0) (const_int 0)) (label_ref (match_operand 0 "" "")) (pc)))] "" "{ extern rtx sequence_stack; rtx prev = XEXP (XEXP (sequence_stack, 1), 0); rtx body = PATTERN (prev); rtx comp; if (GET_CODE (body) == SET) comp = SET_SRC (body); else comp = SET_SRC (XVECEXP (body, 0, 0)); if (GET_CODE (comp) == COMPARE ? GET_MODE_CLASS (GET_MODE (XEXP (comp, 0))) == MODE_FLOAT : GET_MODE_CLASS (GET_MODE (comp)) == MODE_FLOAT) { if (GET_CODE (comp) == COMPARE) { rtx op0 = XEXP (comp, 0); rtx op1 = XEXP (comp, 1); XEXP (comp, 0) = op1; XEXP (comp, 1) = op0; } else { rtx new = gen_rtx (COMPARE, VOIDmode, CONST0_RTX (GET_MODE (comp)), comp); if (GET_CODE (body) == SET) SET_SRC (body) = new; else SET_SRC (XVECEXP (body, 0, 0)) = new; } emit_insn (gen_bge (operands[0])); DONE; }}")(define_insn "" [(set (pc) (if_then_else (le (cc0) (const_int 0)) (label_ref (match_operand 0 "" "")) (pc)))] "" "*OUTPUT_JUMP (\"jle %l0\", \"jbe %l0\", 0) ")(define_insn "bleu" [(set (pc) (if_then_else (leu (cc0) (const_int 0)) (label_ref (match_operand 0 "" "")) (pc)))] "" "jbe %l0");; Negated conditional jump instructions.(define_insn "" [(set (pc) (if_then_else (eq (cc0) (const_int 0)) (pc) (label_ref (match_operand 0 "" ""))))] "" "jne %l0")(define_insn "" [(set (pc) (if_then_else (ne (cc0) (const_int 0)) (pc) (label_ref (match_operand 0 "" ""))))] "" "je %l0")(define_insn "" [(set (pc) (if_then_else (gt (cc0) (const_int 0)) (pc) (label_ref (match_operand 0 "" ""))))] "" "*OUTPUT_JUMP (\"jle %l0\", \"jbe %l0\", 0) ")(define_insn "" [(set (pc) (if_then_else (gtu (cc0) (const_int 0)) (pc) (label_ref (match_operand 0 "" ""))))] "" "jbe %l0")(define_insn "" [(set (pc) (if_then_else (lt (cc0) (const_int 0)) (pc) (label_ref (match_operand 0 "" ""))))] "" "*OUTPUT_JUMP (\"jge %l0\", \"jae %l0\", \"jns %l0\")")(define_insn "" [(set (pc) (if_then_else (ltu (cc0) (const_int 0)) (pc) (label_ref (match_operand 0 "" ""))))] "" "jae %l0")(define_insn "" [(set (pc) (if_then_else (ge (cc0) (const_int 0)) (pc) (label_ref (match_operand 0 "" ""))))] "" "*OUTPUT_JUMP (\"jl %l0\", \"jb %l0\", \"js %l0\")")(define_insn "" [(set (pc) (if_then_else (geu (cc0) (const_int 0)) (pc) (label_ref (match_operand 0 "" ""))))] "" "jb %l0")(define_insn "" [(set (pc) (if_then_else (le (cc0) (const_int 0)) (pc) (label_ref (match_operand 0 "" ""))))] "" "*OUTPUT_JUMP (\"jg %l0\", \"ja %l0\", 0)")(define_insn "" [(set (pc) (if_then_else (leu (cc0) (const_int 0)) (pc) (label_ref (match_operand 0 "" ""))))] "" "ja %l0");; Unconditional and other jump instructions(define_insn "jump" [(set (pc) (label_ref (match_operand 0 "" "")))] "" "jmp %l0")(define_insn "tablejump" [(set (pc) (match_operand:SI 0 "general_operand" "rm")) (use (label_ref (match_operand 1 "" "")))] "" "*{ CC_STATUS_INIT; return \"jmp %*%0\";}")/*(define_insn "" [(set (pc) (if_then_else (ne (compare (minus:HI (match_operand:HI 0 "general_operand" "c") (const_int 1)) (const_int -1)) (const_int 0)) (label_ref (match_operand 1 "" "g")) (pc))) (set (match_dup 0) (minus:HI (match_dup 0) (const_int 1)))] "" "loop %l1")(define_insn "" [(set (pc) (if_then_else (ne (compare (const_int -1) (minus:SI (match_operand:SI 0 "general_operand" "c") (const_int 1))) (const_int 0)) (label_ref (match_operand 1 "" "g")) (pc))) (set (match_dup 0) (minus:SI (match_dup 0) (const_int 1)))] "" "loop %l1")*/;; Call subroutine returning no value.(define_insn "call" [(call (match_operand:QI 0 "indirect_operand" "m") (match_operand:SI 1 "general_operand" "g"))] ;; Operand 1 not really used on the m68000. "" "*{ if (GET_CODE (operands[0]) == MEM && ! CONSTANT_ADDRESS_P (XEXP (operands[0], 0))) { operands[0] = XEXP (operands[0], 0); return \"call %*%0\"; } else return \"call %0\";}");; Call subroutine, returning value in operand 0;; (which must be a hard register).(define_insn "call_value" [(set (match_operand 0 "" "=rf") (call (match_operand:QI 1 "indirect_operand" "m") (match_operand:SI 2 "general_operand" "g")))] ;; Operand 2 not really used on the m68000. "" "*{ if (GET_CODE (operands[1]) == MEM && ! CONSTANT_ADDRESS_P (XEXP (operands[1], 0))) { operands[1] = XEXP (operands[1], 0); output_asm_insn (\"call %*%1\", operands); } else output_asm_insn (\"call %1\", operands);#ifndef FMTOWNS if (TARGET_80387)#endif if (GET_MODE (operands[0]) == DFmode || GET_MODE (operands[0]) == SFmode) { /* fp_pop_level++; */ /* pop if reg dead */ if (!FP_REG_P (operands[0])) abort (); if (top_dead_p (insn)) { POP_ONE_FP; } } RET;}")(define_insn "nop" [(const_int 0)] "" "nop");;- Local variables:;;- mode:emacs-lisp;;- comment-start: ";;- ";;- eval: (set-syntax-table (copy-sequence (syntax-table)));;- eval: (modify-syntax-entry ?[ "(]");;- eval: (modify-syntax-entry ?] ")[");;- eval: (modify-syntax-entry ?{ "(}");;- eval: (modify-syntax-entry ?} "){");;- End:
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