📄 hal_sim.c
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/******************************************************************************/
/* */
/* Copyright (C), 1995-2006, msystems Ltd. All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions are */
/* met: */
/* 1. Redistributions of source code must retain the above copyright notice, */
/* this list of conditions and the following disclaimer. */
/* 2. Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* 3. Neither the name of msystems nor the names of its contributors may be */
/* used to endorse or promote products derived from this software without */
/* specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */
/* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */
/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */
/* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */
/* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */
/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED */
/* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR */
/* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */
/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* */
/******************************************************************************/
/*
* $Log:
*/
/*
* includes
*/
#include "hal_sim.h"
#include "sim_dev.h"
#include "doch_sys.h"
#include "doch_ata.h"
#include "flcustom.h"
#include "flsystem.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
* global vars
*/
/*
* Externals
*/
extern FLDword gAccessLayerType;
/******************************************************************************
* *
* d o c h _ s y s _ i n i t *
* *
* Initialize BSP specific part of DOCH driver. *
* *
* Parameters : *
* socketNo : Socket # (0...DOCH_MAX_SOCKETS-1) *
* *
* Returns : *
* 0 if success, otherwise respective error code. *
* *
******************************************************************************/
DOCH_Error hal_init_sim ( FLSNative socketNo)
{
#ifdef DOCH_RAM_SIMULATION
DOCH_SimSocket* pSimSock = getSimSocket();
#endif /*DOCH_RAM_SIMULATION*/
#ifdef DOCH_FILE_SIMULATION
/* register int i;*/
#endif /* DOCH_FILE_SIMULATION */
DOCH_Socket* pdev;
DOCH_get_socket(pdev, socketNo);
/*If socket is not registered, return error*/
if(pdev == NULL)
return DOCH_DiskNotFound;
/*Register access layer routines*/
pdev->halRoutines.hal_get_ata_reg = hal_get_ata_reg_sim;
pdev->halRoutines.hal_set_ata_reg = hal_set_ata_reg_sim;
pdev->halRoutines.hal_get_ctrl_reg = hal_get_ctrl_reg_sim;
pdev->halRoutines.hal_set_ctrl_reg = hal_set_ctrl_reg_sim;
pdev->halRoutines.hal_blk_read = hal_blk_read_sim;
pdev->halRoutines.hal_blk_write = hal_blk_write_sim;
pdev->halRoutines.hal_doch_release = doch_sys_release_sim;
gAccessLayerType = DOCH_AL_SIM;
#ifdef DOCH_RAM_SIMULATION
initSimRegisters();
initDriveParameters(DOCH_NUM_OF_SIMULATED_DEVICES);
pSimSock->device[0].dwDevSizeInSectors = (FLDword)((DOCH_SIM_CAPACITY >> DOCH_SECTOR_SIZE_BITS) * DOCH_SIM_CAPACITY_PERCENTAGE);
pSimSock->device[1].dwDevSizeInSectors = (FLDword)((DOCH_SIM_CAPACITY >> DOCH_SECTOR_SIZE_BITS) * DOCH_SIM_CAPACITY_PERCENTAGE);
pSimSock->bSlavePresent = (DOCH_NUM_OF_SIMULATED_DEVICES - 1);
initVarious(TRUE);
#endif /*DOCH_RAM_SIMULATION*/
#ifdef DOCH_FILE_SIMULATION
/*If filename was NOT supplied!*/
if( pSimFileName == NULL )
{
DBG_PRINT_FLOW_PRM(FLZONE_MTD, (FLTXT("Simulation filename NOT supplied!!!\r\n")));
}
return SimRegDeviceFromFile((FLSByte*)pSimFileName, dwSimLength[0], dwSimLength[1]);
#else /*DOCH_FILE_SIMULATION not defined*/
return DOCH_OK;
#endif /*DOCH_FILE_SIMULATION*/
}
DOCH_Error hal_init_sim_noFunc ( FLSNative socketNo)
{
gAccessLayerType = DOCH_AL_SIM;
return DOCH_OK;
}
/*********************************************************/
/* Function name : doch_sys_release_sim*/
/* Description : */
/* Return type : */
/* Argument : int socketNo*/
/*********************************************************/
int doch_sys_release_sim(int socketNo)
{
#ifndef DOCH_RAM_SIMULATION
#ifdef DOCH_MEMMAP_FILE
return 0;
#else /*DOCH_MEMMAP_FILE not defines*/
size_t szWriteLen;
DOCH_Error status = DOCH_GeneralFailure;
DOCH_SimSocket* pSimSock = getSimSocket();
DOCH_SimDevice* pSimH3 = &(pSimSock->device[0]);
FLByte bDev;
FLByte tempBuf[sizeof(SIMULTOR_IDENTIFY_STRING)];
tffsset(tempBuf,0,sizeof(SIMULTOR_IDENTIFY_STRING));
if( pSimH3 == NULL )
{
return status; /* device not found */
}
if( pSimSock->pSimFile==NULL )
{
return status; /* invalid device */
}
/* seek to the beginning of the file */
fseek( pSimSock->pSimFile, 0, SEEK_SET);
/* write simulator identify string */
tffscpy(tempBuf,SIMULTOR_IDENTIFY_STRING,sizeof(SIMULTOR_IDENTIFY_STRING));
szWriteLen = fwrite( (void*)tempBuf, 1,sizeof(SIMULTOR_IDENTIFY_STRING), pSimSock->pSimFile );
if (szWriteLen==sizeof(SIMULTOR_IDENTIFY_STRING))
{
/* write slave existing indication */
szWriteLen = fwrite( (void*)&(pSimSock->bSlavePresent), 1,sizeof(pSimSock->bSlavePresent), pSimSock->pSimFile );
if( szWriteLen==sizeof(pSimSock->bSlavePresent) )
{
/* write host configuration registers, which should not be changed between resets */
/* zero all registers, but ChipID */
pSimSock->config_regs.wBurstReadModeCtrl =
pSimSock->config_regs.wBurstWriteModeCtrl =
pSimSock->config_regs.wBurstWriteModeExit =
pSimSock->config_regs.wDMACtrl =
pSimSock->config_regs.wDmaNegation =
pSimSock->config_regs.wDownloadCtrl =
pSimSock->config_regs.wEndianCtrl =
pSimSock->config_regs.wIPLCtrl =
pSimSock->config_regs.wOperationMode =
pSimSock->config_regs.wPowerDown =
pSimSock->config_regs.wPowerMode =
pSimSock->config_regs.wSWLock =
pSimSock->config_regs.wWarmBoot = 0;
szWriteLen = fwrite( (void*)&(pSimSock->config_regs), 1,sizeof(pSimSock->config_regs), pSimSock->pSimFile );
if( szWriteLen==sizeof(pSimSock->config_regs) )
{
for( bDev=0; (bDev<ATA_MAX_NUM_OF_DEVICES) && (pSimH3[bDev].dwDevSizeInSectors!=0); bDev++ )
{
status = DOCH_GeneralFailure;
/* write data size */
szWriteLen = fwrite( (void*)&((pSimH3+bDev)->dwDevSizeInSectors), 1,sizeof((pSimH3+bDev)->dwDevSizeInSectors), pSimSock->pSimFile );
if( szWriteLen==sizeof((pSimH3+bDev)->dwDevSizeInSectors) )
{
szWriteLen = fwrite( (void*)&((pSimH3+bDev)->dwTotalDevSizeInSectors), 1,sizeof((pSimH3+bDev)->dwTotalDevSizeInSectors), pSimSock->pSimFile );
if( szWriteLen==sizeof((pSimH3+bDev)->dwTotalDevSizeInSectors) )
{
/* write IPL mode */
szWriteLen = fwrite( (void*)&((pSimH3+bDev)->wIPLMode), 1,sizeof((pSimH3+bDev)->wIPLMode), pSimSock->pSimFile );
if( szWriteLen==sizeof((pSimH3+bDev)->wIPLMode) )
{
/* write IPL Max Size */
szWriteLen = fwrite( (void*)&((pSimH3+bDev)->dwXIPMaxSize), 1,sizeof((pSimH3+bDev)->dwXIPMaxSize), pSimSock->pSimFile );
if( szWriteLen==sizeof((pSimH3+bDev)->dwXIPMaxSize) )
{
/* write ETFFS Size */
szWriteLen = fwrite( (void*)&((pSimH3+bDev)->dwEtffsSize), 1,sizeof((pSimH3+bDev)->dwEtffsSize), pSimSock->pSimFile );
if( szWriteLen==sizeof((pSimH3+bDev)->dwEtffsSize) )
{
/* write ETFFS Data */
szWriteLen = fwrite( (void*)&((pSimH3+bDev)->bEtffsCode), 1,sizeof((pSimH3+bDev)->bEtffsCode), pSimSock->pSimFile );
if( szWriteLen==sizeof((pSimH3+bDev)->bEtffsCode) )
{
/* write drive parameters */
szWriteLen = fwrite( (void*)&((pSimH3+bDev)->driveParameters), 1, sizeof((pSimH3+bDev)->driveParameters), pSimSock->pSimFile );
if( szWriteLen==sizeof((pSimH3+bDev)->driveParameters) )
{
/* write device info */
szWriteLen = fwrite( (void*)getDiskOnChipDeviceInfo(bDev), 1, sizeof(DOCH_DeviceInfo), pSimSock->pSimFile );
if(szWriteLen==sizeof(DOCH_DeviceInfo))
{
/* write partitions parameters */
szWriteLen = fwrite( (void*)&((pSimH3+bDev)->partitions),1, sizeof((pSimH3+bDev)->partitions), pSimSock->pSimFile );
if( szWriteLen==sizeof((pSimH3+bDev)->partitions) )
{
/* write device attributes */
szWriteLen = fwrite( (void*)&((pSimH3+bDev)->diskAttributes),1, sizeof( (pSimH3+bDev)->diskAttributes ), pSimSock->pSimFile );
if( szWriteLen==sizeof((pSimH3+bDev)->diskAttributes) )
{
/* write data */
szWriteLen = fwrite( (void*)((pSimH3+bDev)->bStorage), 1,((pSimH3+bDev)->dwDevSizeInSectors << DOCH_SECTOR_SIZE_BITS), pSimSock->pSimFile );
if( szWriteLen==((pSimH3+bDev)->dwDevSizeInSectors << DOCH_SECTOR_SIZE_BITS) )
{
if( (bDev==1) || ((pSimH3[1].dwDevSizeInSectors==0)))
status = DOCH_OK; /* every things OK */
}
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