t_mmio.c

wince host 和 target PCI驱动程序

		mmio_reg_p->offset,
		mmio_reg_p->init_mask,
		mmio_reg_p->init_val) ;
	mmio_reg_p++ ;
	}

return errors ;
}

/*
 * mmio read/write walking 1's test
 */
int
t_mmio_walk1()
{
int		errors ;
int32		start_val ;
int32		loop_val ;
int32		exp_val ;
int		count ;
MMIO_REG	*mmio_reg_p ;
char		*mmio_virt_base_cp ;

errors = 0 ;
mmio_virt_base_cp = (char *) mmio_virt_base ;

/*
 * Outer loop for walking 1's test
 */
printf("mmio walking ones test\n") ;
start_val = 1 ;
while (start_val != 0)
	{
	/*
	 * Fill mmio regs with walking 1's pattern
	 */
	loop_val = start_val ;
	mmio_reg_p = GetMMIORegPtr() ;
	count = MMIO_REGS_COUNT ;
	while (count-- != 0)
		{
		if (mmio_reg_p->rd_wr_mask != 0)
			{
			exp_val = loop_val & mmio_reg_p->rd_wr_mask ;
			*((uint32 *) (mmio_virt_base_cp+mmio_reg_p->offset)) = exp_val ;
			}
		loop_val = loop_val << 1 ;
		if (loop_val == 0)
			{
			loop_val = 1 ;
			}
		mmio_reg_p++ ;
		}

	/*
	 * Check mmio regs with walking 1's pattern
	 */
	loop_val = start_val ;
	mmio_reg_p = GetMMIORegPtr() ;
	count = MMIO_REGS_COUNT ;
	while (count-- != 0)
		{
		if (mmio_reg_p->rd_wr_mask != 0)
			{
			exp_val = loop_val ;
			errors += verify_mmio(mmio_virt_base,
				mmio_reg_p->name,
				mmio_reg_p->offset,
				mmio_reg_p->rd_wr_mask,
				exp_val) ;
			}

		loop_val = loop_val << 1 ;
		if (loop_val == 0)
			{
			loop_val = 1 ;
			}
		mmio_reg_p++ ;
		}

	/*
	 * Walk initial 1 to the left
	 */
	start_val = start_val << 1 ;
	}

return errors ;
}

/*
 * mmio read/write walking 0's test
 */
int
t_mmio_walk0()
{
int		errors ;
int32		start_val ;
int32		loop_val ;
int32		exp_val ;
int		count ;
MMIO_REG	*mmio_reg_p ;
char		*mmio_virt_base_cp ;

errors = 0 ;
mmio_virt_base_cp = (char *) mmio_virt_base ;

/*
 * Outer loop for walking zeros test
 */
printf("mmio walking zeros test\n") ;
start_val = 1 ;
while (start_val != 0)
	{
	/*
	 * Fill mmio regs with walking 0's pattern
	 */
	loop_val = start_val ;
	mmio_reg_p = GetMMIORegPtr() ;
	count = MMIO_REGS_COUNT ;
	while (count-- != 0)
		{
		if (mmio_reg_p->rd_wr_mask != 0)
			{
			exp_val = (~loop_val) & mmio_reg_p->rd_wr_mask ;
			*((uint32 *) (mmio_virt_base_cp+mmio_reg_p->offset)) = exp_val ;
			}

		loop_val = loop_val << 1 ;
		if (loop_val == 0)
			{
			loop_val = 1 ;
			}
		mmio_reg_p++ ;
		}

	/*
	 * Check mmio regs with walking 0's pattern
	 */
	loop_val = start_val ;
	mmio_reg_p = GetMMIORegPtr() ;
	count = MMIO_REGS_COUNT ;
	while (count-- != 0)
		{
		if (mmio_reg_p->rd_wr_mask != 0)
			{
			exp_val = (~loop_val) & mmio_reg_p->rd_wr_mask ;
			errors += verify_mmio(mmio_virt_base,
				mmio_reg_p->name,
				mmio_reg_p->offset,
				mmio_reg_p->rd_wr_mask,
				exp_val) ;
			}

		loop_val = loop_val << 1 ;
		if (loop_val == 0)
			{
			loop_val = 1 ;
			}
		mmio_reg_p++ ;
		}

	/*
	 * Walk initial 1 to the left
	 */
	start_val = start_val << 1 ;
	}

return errors ;
}

/*
 * turn off BO bit in BIU_CTL
 */
int
t_mmio_burst_off()
{
int32		old_val ;
int32		new_val ;

old_val = MMIO(BIU_CNTL) ;
new_val = old_val | 0x2 ;
MMIO(BIU_CNTL) = new_val ;

printf("Burst mode off - BIU_CNTL: old %08x new %08x\n", old_val, new_val) ;

return 0 ;
}

/*
 * turn on BO bit in BIU_CNTL
 */
int
t_mmio_burst_on()
{
int32		old_val ;
int32		new_val ;

old_val = MMIO(BIU_CNTL) ;
new_val = old_val & ~0x2 ;
MMIO(BIU_CNTL) = new_val ;

printf("Burst mode on -  BIU_CNTL: old %08x new %08x\n", old_val, new_val) ;

return 0 ;
}

PVOID GetMMIORegPtr ( VOID )
{
	DWORD	DSPHandle;
	STATUS	Status;
	TMMAN_DSP_CAPS	DSPCaps;
	PVOID	MMIORegPtr = mmio_reg_tm1s;

	if ( ( Status = tmDSPOpen (0, &DSPHandle ) ) != TMOK )
	{
		goto GetMMIORegPtrExit;
	}

	if ( ( Status = tmDSPGetCaps ( DSPHandle, &DSPCaps ) ) != TMOK )
	{
		goto GetMMIORegPtrExit;
	}

	switch ( ( DSPCaps.dwCPUVersion & 0x30 ) >> 4)
	{
		case 0 :
		MMIORegPtr = mmio_reg_tm1;
		break;


		case 1 :
		MMIORegPtr = mmio_reg_tm1s;
		break;

		case 2 :
		default :
		MMIORegPtr = mmio_reg_tm1c;
		break;
	}

	tmDSPClose ( DSPHandle );

GetMMIORegPtrExit :
	return MMIORegPtr;
}