📄 tmhal.c
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/*----------------------------------------------------------------------------
COPYRIGHT (c) 1995 by Philips Semiconductors
THIS SOFTWARE IS FURNISHED UNDER A LICENSE AND MAY ONLY BE USED AND COPIED IN
ACCORDANCE WITH THE TERMS AND CONDITIONS OF SUCH A LICENSE AND WITH THE
INCLUSION OF THE THIS COPY RIGHT NOTICE. THIS SOFTWARE OR ANY OTHER COPIES
OF THIS SOFTWARE MAY NOT BE PROVIDED OR OTHERWISE MADE AVAILABLE TO ANY OTHER
PERSON. THE OWNERSHIP AND TITLE OF THIS SOFTWARE IS NOT TRANSFERRED.
THE INFORMATION IN THIS SOFTWARE IS SUBJECT TO CHANGE WITHOUT ANY PRIOR NOTICE
AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY Philips Semiconductor.
PHILIPS ASSUMES NO RESPONSIBILITY FOR THE USE OR RELIABILITY OF THIS SOFTWARE
ON PLATFORMS OTHER THAN THE ONE ON WHICH THIS SOFTWARE IS FURNISHED.
----------------------------------------------------------------------------*/
/*
HISTORY
#define TR Tilakraj Roy
960510 TR Created
*/
/*----------------------------------------------------------------------------
SYSTEM INCLUDE FILES
----------------------------------------------------------------------------*/
#define WANTVXDWRAPS
#include <basedef.h>
#include <vmm.h>
#include <vxdwraps.h>
#include "vxstd.h"
#include "vxdbg.h"
#include "vxwin.h"
#include "tmInterrupts.h"
#pragma VxD_LOCKED_CODE_SEG
#pragma VxD_LOCKED_DATA_SEG
/*----------------------------------------------------------------------------
DRIVER SPECIFIC INCLUDE FILES
----------------------------------------------------------------------------*/
#include "mmio.h"
#include "tmwincom.h"
#include "tmhd.h"
#include "tmmmio.h"
#include "tmhal.h"
#include "tmshare.h"
#include "tmman32.h"
VOID halDebugDump ( PVOID pDevice );
STATUS halCreate( DWORD dwSDRAMBase, DWORD dwSDRAMSize,
DWORD dwMMIOBase, PVOID pContainer, PVOID *ppHAL )
{
PTMHAL_OBJECT this;
STATUS Status;
TMMAN_DSP_CAPS DSPCaps;
WORD wPrinterPort;
if ( *ppHAL )
{
this = *ppHAL;
this->Flags = 0;
}
else
{
if ( ( this = vxdMalloc ( sizeof ( TMHAL_OBJECT ) ) ) == NULL )
{
Status = TM_STATUS ( TMHAL_ERR_OBJALLOCFAIL );
goto halCreate_fail1;
}
this->Flags = 0;
FlagSet ( this->Flags, TMHAL_FLAG_DYNAMICOBJ);
}
this->Size = sizeof ( TMHAL_OBJECT );
this->pContainer = pContainer;
if ( ( Status = boardGetCaps ( this->pContainer, &DSPCaps ) ) != TMOK )
goto halCreate_fail2;
wPrinterPort =
(WORD)((PINIT_OBJECT)(pDriverObject->pInitObj))->dwPrinterPort;
this->CPUVersion = DSPCaps.dwCPUVersion;
this->MMIO.pVIC = (PTMHAL_MMIO_VIC)(dwMMIOBase + 0x100800);
this->MMIO.pTimers = (PTMHAL_MMIO_TIMERS)(dwMMIOBase + 0x100c00);
this->MMIO.pDebug = (PTMHAL_MMIO_DEBUG)(dwMMIOBase + 0x101000);
this->MMIO.pBIU = (PTMHAL_MMIO_BIU)(dwMMIOBase + 0x103004);
this->MMIO.pAudioIn = (PTMHAL_MMIO_AUDIO)(dwMMIOBase + 0x101c00);
this->MMIO.pAudioOut = (PTMHAL_MMIO_AUDIO)(dwMMIOBase + 0x102000);
this->MMIO.pCache = (PTMHAL_MMIO_CACHE)(dwMMIOBase + 0x100000);
this->MMIO.pSpace = (PBYTE)(dwMMIOBase);
this->pbSDRAM = (PBYTE)dwSDRAMBase;
this->pbMMIO = (PBYTE)dwMMIOBase;
this->dwSDRAMSize = dwSDRAMSize;
this->wPrinterPort = wPrinterPort;
if ( ( Status = shmemAllocate ( GetShMemObject ( this->pContainer),
0 , sizeof ( TMHD_HAL_SHARED ), &this->pSharedData,
&this->SharedDataPhys ) ) != TMOK )
goto halCreate_fail2;
boardParameterDWORDSet ( this->pContainer, TMHD_PARAM_HAL, this->SharedDataPhys );
dbgRegister ( halDebugDump, "Hardware Abstraction Layer");
this->pSharedData->Ring0ISRActive = FALSE;
this->pSharedData->H2TInterruptReq = FALSE;
*ppHAL = this;
if ( ((PINIT_OBJECT)(pDriverObject->pInitObj))->dwDisableHal )
goto halCreate_exit;
// check if it a CRC chip
if ( ( TMSTD_GETTMTYPE(this->CPUVersion) == TMSTD_TYPE_TM1000 ) &&
( TMSTD_GETTMREV(this->CPUVersion) == 0 ) )
{
__asm {
push eax
push edx
mov dx, wPrinterPort
mov al, 00h
out dx, al
pop edx
pop eax
}
}
halCreate_exit:
return TMOK;
/* SEH code */
/*
halCreate_fail3:
shmemFree ( GetShMemObject ( this->pContainer), this->pSharedData );
*/
halCreate_fail2:
this->Size = 0;
if( FlagGet ( this->Flags, TMHAL_FLAG_DYNAMICOBJ ) )
{
vxdFree ( this );
}
halCreate_fail1:
return Status;
}
VOID halRegisterInit ( PVOID pvObject, DWORD dwSDRAMPhys,
DWORD dwSDRAMCacheLimit, DWORD dwMMIOPhys )
{
PTMHAL_OBJECT this = (PTMHAL_OBJECT)pvObject;
DWORD SwappedBIUControl;
BYTE TempByte;
this->dwSDRAMPhys = dwSDRAMPhys;
this->dwSDRAMCacheLimit = dwSDRAMCacheLimit;
if ( ((PINIT_OBJECT)(pDriverObject->pInitObj))->dwDisableHal )
return;
// get the CPU in wintel mode
// check if it is a CTC chip
if ( ( TMSTD_GETTMTYPE(this->CPUVersion) == TMSTD_TYPE_TM1000 ) &&
( TMSTD_GETTMREV(this->CPUVersion) == 0 ) )
{
this->MMIO.pBIU->dwBIUControl |=
( TMHAL_BIU_CONTROL_SE | TMHAL_BIU_CONTROL_BO | TMHAL_BIU_CONTROL_HE );
if ( (this->MMIO.pBIU->dwBIUControl & (TMHAL_BIU_CONTROL_CR )) ==
(TMHAL_BIU_CONTROL_CR ) )
{
this->fFirstTimeReset = FALSE;
}
else
{
// added TRC 970225
this->MMIO.pBIU->dwBIUControl |= TMHAL_BIU_CONTROL_SR;
this->fFirstTimeReset = TRUE;
}
this->MMIO.pCache->dwDRAMCacheableLimit = this->dwSDRAMCacheLimit;
this->MMIO.pCache->dwDRAMLimit = this->dwSDRAMPhys + this->dwSDRAMSize;
this->MMIO.pCache->dwDRAMCacheableLimit = this->dwSDRAMCacheLimit;
}
else
{ // TRC961106 - fix for TM1 : write to BIU control in motorola mode.
if ( (this->MMIO.pBIU->dwBIUControl &
(TMHAL_BIU_CONTROL_SE | TMHAL_BIU_CONTROL_HE)) == 0x0 ) // TRC970206 change request by Geritt.S
//(TMHAL_BIU_CONTROL_SE | TMHAL_BIU_CONTROL_BO | TMHAL_BIU_CONTROL_HE)) == 0x0 )
{ // virgin biu control
SwappedBIUControl =
( TMHAL_BIU_CONTROL_SE | TMHAL_BIU_CONTROL_HE | TMHAL_BIU_CONTROL_SR );// TRC970206 change request by Geritt.S
// ( TMHAL_BIU_CONTROL_SE | TMHAL_BIU_CONTROL_BO | TMHAL_BIU_CONTROL_HE | TMHAL_BIU_CONTROL_SR );
// do a dword swap
TempByte = ((PBYTE)&SwappedBIUControl)[0];
((PBYTE)&SwappedBIUControl)[0] = ((PBYTE)&SwappedBIUControl)[3];
((PBYTE)&SwappedBIUControl)[3] = TempByte;
TempByte = ((PBYTE)&SwappedBIUControl)[1];
((PBYTE)&SwappedBIUControl)[1] = ((PBYTE)&SwappedBIUControl)[2];
((PBYTE)&SwappedBIUControl)[2] = TempByte;
this->MMIO.pBIU->dwBIUControl = SwappedBIUControl;
this->fFirstTimeReset = TRUE;
}
else
{
this->fFirstTimeReset = FALSE;
}
// set the cache details every time this function is called
this->MMIO.pCache->dwDRAMLimit = this->dwSDRAMPhys + this->dwSDRAMSize;
//this->MMIO.pCache->dwDRAMCacheableLimit = this->dwSDRAMPhys;
this->MMIO.pCache->dwDRAMCacheableLimit = this->dwSDRAMCacheLimit;
// end common initialization
// check if it a TM1
if ( TMSTD_GETTMTYPE(this->CPUVersion) == TMSTD_TYPE_TM1000 )
{
this->MMIO.pCache->dwDCacheLockControl |= TMHAL_DC_LOCK_CTL_HD;
}
else // its gottabe a TM1000S
{
// disable the hole - power on default is enable hole
//TRC970324 : Commneted in Gerritt.S request - TM1S should use default value.
//this->MMIO.pCache->dwDCacheLockControl |=
//( TMHAL_DC_LOCK_CTL_HOLE_CTL & ( TMHAL_HOLE_CTL_HDS ) << 5 ) ;
}
}
// common the TM family.
// clear the IPending register intially
this->MMIO.pVIC->dwIMask = (DWORD)(0x0);
this->MMIO.pVIC->dwIClear = (DWORD)(~0x0);
}
VOID halDSPStart ( PVOID pvObject )
{
PTMHAL_OBJECT this = (PTMHAL_OBJECT)pvObject;
if ( ((PINIT_OBJECT)(pDriverObject->pInitObj))->dwDisableHal )
return;
// clear the IMask & IClear register
this->MMIO.pVIC->dwIMask = (DWORD)(0x0);
this->MMIO.pVIC->dwIClear = (DWORD)(~0x0);
// just in case this has been corrupted put it back.
boardParameterDWORDSet ( this->pContainer, TMHD_PARAM_HAL, this->SharedDataPhys );
if ( ( TMSTD_GETTMTYPE(this->CPUVersion) == TMSTD_TYPE_TM1000 ) &&
( TMSTD_GETTMREV(this->CPUVersion) == 0 ) )
{
if( this->fFirstTimeReset )
{
// get the CPU out of reset
this->MMIO.pBIU->dwBIUControl |= TMHAL_BIU_CONTROL_CR;
this->fFirstTimeReset = FALSE;
}
else
{
/* generate an interrupt with the vector set to SDRAM base */
halIRQConnect( this, TMHD_HAL_DSPIRQNUMBER_TM1,
FALSE, TMHAL_INT_NON_MASKABLE, this->dwSDRAMPhys );
halIRQEnable( this, TMHD_HAL_DSPIRQNUMBER_TM1 );
halIRQDSPGen ( this );
}
}
else
{
this->MMIO.pBIU->dwBIUControl &= (~TMHAL_BIU_CONTROL_SR);
this->MMIO.pBIU->dwBIUControl |= TMHAL_BIU_CONTROL_CR;
}
}
VOID halDSPStop ( PVOID pvObject )
{
PTMHAL_OBJECT this = (PTMHAL_OBJECT)pvObject;
DWORD Idx;
if ( ((PINIT_OBJECT)(pDriverObject->pInitObj))->dwDisableHal )
return;
if ( ( TMSTD_GETTMTYPE(this->CPUVersion) == TMSTD_TYPE_TM1000 ) &&
( TMSTD_GETTMREV(this->CPUVersion) == 0 ) );
else
{
// clear and mask all interrupts
this->MMIO.pVIC->dwIMask = (DWORD)(0x0);
this->MMIO.pVIC->dwIClear = (DWORD)(~0x0);
// biu reset BIU_CTL
this->MMIO.pBIU->dwBIUControl &= (~TMHAL_BIU_CONTROL_CR);
this->MMIO.pBIU->dwBIUControl |= TMHAL_BIU_CONTROL_SR;
// reset the peripherals
// audio out AO_CTL
*((PDWORD)(this->MMIO.pSpace + AO_CTL )) = 0x80000000;
*((PDWORD)(this->MMIO.pSpace + AO_FREQ )) = 0;
// audio in AI_CTL
*((PDWORD)(this->MMIO.pSpace + AI_CTL )) = 0x80000000;
*((PDWORD)(this->MMIO.pSpace + AI_FREQ )) = 0;
// video in VI_CTL
*((PDWORD)(this->MMIO.pSpace + VI_CTL )) = 0x00080000;
*((PDWORD)(this->MMIO.pSpace + VI_CLOCK )) = 0;
// video out VO_CTL
*((PDWORD)(this->MMIO.pSpace + VO_CTL )) = 0x80000000;
*((PDWORD)(this->MMIO.pSpace + VO_CLOCK )) = 0;
//ssi SSI_CTL
*((PDWORD)(this->MMIO.pSpace + SSI_CTL )) = 0xc0000000;
//added to leave phone on hook after reset - chuck's request
*((PDWORD)(this->MMIO.pSpace + SSI_CTL )) = (1 << 18);
//icp ICP_SR
for ( Idx= 0 ; Idx < 10 ; Idx ++ )
{
// do it 10 times just to make sure ....
if ( (*((PDWORD)(this->MMIO.pSpace + ICP_SR )) & 0x01) )
break;
//( *((PDWORD)(this->MMIO.pSpace + 0x102414 )) ) &= 0x80;
// changed on usman's request TRC970225
( *((PDWORD)(this->MMIO.pSpace + ICP_SR )) ) = 0x80;
}
//iic IIC_CTL
// disable
*((PDWORD)(this->MMIO.pSpace + IIC_CTL )) = 0;
//enable
//*((PDWORD)(this->MMIO.pSpace + 0x10340c )) |= 0x00000001;
//vld VLD_CMD
// reset the VLD once
*((PDWORD)(this->MMIO.pSpace + VLD_COMMAND )) = 0x00000401;
//jtag JTAG_CTL
//*((PDWORD)(this->MMIO.pSpace + JTAG_CTL )) = 0x0;
// turn off all timer control
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