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count[3] Net - - 2.660 - 6
lcd_instance.lcd_data_7_sqmuxa_0_o3 NOR2A B In - 2.952 -
lcd_instance.lcd_data_7_sqmuxa_0_o3 NOR2A Y Out 0.232 3.184 -
lcd_data_7_sqmuxa_0_o3 Net - - 3.320 - 8
lcd_instance.state_ns_o5[1] OR2A A In - 6.504 -
lcd_instance.state_ns_o5[1] OR2A Y Out 0.305 6.809 -
state_ns_o5[1] Net - - 1.900 - 4
lcd_instance.lcd_data_3_sqmuxa_0_a5 OR2A B In - 8.709 -
lcd_instance.lcd_data_3_sqmuxa_0_a5 OR2A Y Out 0.362 9.071 -
lcd_data_3_sqmuxa Net - - 1.480 - 3
lcd_instance.un1_display_char_14_0_1[7] NOR3C C In - 10.551 -
lcd_instance.un1_display_char_14_0_1[7] NOR3C Y Out 0.370 10.921 -
un1_display_char_14_0_1[7] Net - - 0.630 - 1
lcd_instance.char_mode_process.display_char_15_m_0 AO1 B In - 11.551 -
lcd_instance.char_mode_process.display_char_15_m_0 AO1 Y Out 0.327 11.878 -
display_char_15_m_0 Net - - 0.630 - 1
lcd_instance.un1_display_char_14_3_iv[7] OR3C C In - 12.508 -
lcd_instance.un1_display_char_14_3_iv[7] OR3C Y Out 0.370 12.878 -
un1_display_char_14_3_iv[7] Net - - 0.630 - 1
lcd_instance.lcd_data[7] DFN1E0 D In - 13.508 -
===================================================================================================================
Total path delay (propagation time + setup) of 13.918 is 2.668(19.2%) logic and 11.250(80.8%) route.
Path information for path number 4:
Requested Period: 10.000
- Setup time: 0.410
= Required time: 9.590
- Propagation time: 13.508
= Slack (non-critical) : -3.918
Number of logic level(s): 6
Starting point: lcd_instance.count[3] / Q
Ending point: lcd_instance.lcd_data[4] / D
The start point is clocked by System [rising] on pin CLK
The end point is clocked by System [rising] on pin CLK
Instance / Net Pin Pin Arrival No. of
Name Type Name Dir Delay Time Fan Out(s)
-----------------------------------------------------------------------------------------------------------------
lcd_instance.count[3] DFN1C1 Q Out 0.292 0.292 -
count[3] Net - - 2.660 - 6
lcd_instance.lcd_data_7_sqmuxa_0_o3 NOR2A B In - 2.952 -
lcd_instance.lcd_data_7_sqmuxa_0_o3 NOR2A Y Out 0.232 3.184 -
lcd_data_7_sqmuxa_0_o3 Net - - 3.320 - 8
lcd_instance.state_ns_o5[1] OR2A A In - 6.504 -
lcd_instance.state_ns_o5[1] OR2A Y Out 0.305 6.809 -
state_ns_o5[1] Net - - 1.900 - 4
lcd_instance.lcd_data_3_sqmuxa_0_a5 OR2A B In - 8.709 -
lcd_instance.lcd_data_3_sqmuxa_0_a5 OR2A Y Out 0.362 9.071 -
lcd_data_3_sqmuxa Net - - 1.480 - 3
lcd_instance.un1_display_char_14_1[4] NOR3C C In - 10.551 -
lcd_instance.un1_display_char_14_1[4] NOR3C Y Out 0.370 10.921 -
un1_display_char_14_1[4] Net - - 0.630 - 1
lcd_instance.char_mode_process.display_char_14_m AO1 B In - 11.551 -
lcd_instance.char_mode_process.display_char_14_m AO1 Y Out 0.327 11.878 -
display_char_14_m Net - - 0.630 - 1
lcd_instance.un1_display_char_14_2_iv[4] OR3C C In - 12.508 -
lcd_instance.un1_display_char_14_2_iv[4] OR3C Y Out 0.370 12.878 -
un1_display_char_14_2_iv[4] Net - - 0.630 - 1
lcd_instance.lcd_data[4] DFN1E0 D In - 13.508 -
=================================================================================================================
Total path delay (propagation time + setup) of 13.918 is 2.668(19.2%) logic and 11.250(80.8%) route.
Path information for path number 5:
Requested Period: 10.000
- Setup time: 0.310
= Required time: 9.690
- Propagation time: 13.440
= Slack (non-critical) : -3.750
Number of logic level(s): 7
Starting point: lcd_instance.state[2] / Q
Ending point: lcd_instance.count[3] / D
The start point is clocked by System [rising] on pin CLK
The end point is clocked by System [rising] on pin CLK
Instance / Net Pin Pin Arrival No. of
Name Type Name Dir Delay Time Fan Out(s)
----------------------------------------------------------------------------------------------------
lcd_instance.state[2] DFN1C1 Q Out 0.364 0.364 -
state[2] Net - - 3.990 - 10
lcd_instance.lcd_data_0_sqmuxa_0_a5 NOR2B A In - 4.354 -
lcd_instance.lcd_data_0_sqmuxa_0_a5 NOR2B Y Out 0.293 4.647 -
state_ns[7] Net - - 1.480 - 3
lcd_instance.un1_state_3_i NOR3 C In - 6.127 -
lcd_instance.un1_state_3_i NOR3 Y Out 0.416 6.543 -
un1_state_3_i Net - - 1.060 - 2
lcd_instance.un1_count_3.I_1 AND2 B In - 7.603 -
lcd_instance.un1_count_3.I_1 AND2 Y Out 0.351 7.954 -
DWACT_ADD_CI_0_TMP[0] Net - - 1.060 - 2
lcd_instance.un1_count_3.I_19 NOR2B A In - 9.014 -
lcd_instance.un1_count_3.I_19 NOR2B Y Out 0.293 9.307 -
DWACT_ADD_CI_0_g_array_1[0] Net - - 1.060 - 2
lcd_instance.un1_count_3.I_21 NOR2B A In - 10.367 -
lcd_instance.un1_count_3.I_21 NOR2B Y Out 0.293 10.660 -
I_21 Net - - 0.630 - 1
lcd_instance.un1_count_3.I_17 XOR2 B In - 11.290 -
lcd_instance.un1_count_3.I_17 XOR2 Y Out 0.520 11.810 -
I_17 Net - - 0.630 - 1
lcd_instance.state_set.count_7[3] NOR3C C In - 12.440 -
lcd_instance.state_set.count_7[3] NOR3C Y Out 0.370 12.810 -
count_7[3] Net - - 0.630 - 1
lcd_instance.count[3] DFN1C1 D In - 13.440 -
====================================================================================================
Total path delay (propagation time + setup) of 13.750 is 3.210(23.3%) logic and 10.540(76.7%) route.
##### END OF TIMING REPORT #####]
--------------------------------------------------------------------------------
Report for cell TOP.def_arch
Cell usage:
cell count area count*area
DFN1C1 41 1.0 41.0
GND 32 0.0 0.0
VCC 32 0.0 0.0
XOR2 27 1.0 27.0
INV 26 1.0 26.0
INBUF 15 0.0 0.0
OUTBUF 15 0.0 0.0
NOR2B 14 1.0 14.0
NOR2 12 1.0 12.0
AO1 12 1.0 12.0
OR2 11 1.0 11.0
NOR3C 10 1.0 10.0
OR2A 10 1.0 10.0
AO1A 10 1.0 10.0
AND2 10 1.0 10.0
MX2C 9 1.0 9.0
NOR2A 8 1.0 8.0
DFN1P1C1 8 4.0 32.0
OR3C 7 1.0 7.0
DFN1E0 6 1.0 6.0
NOR3B 6 1.0 6.0
OR3A 4 1.0 4.0
AOI1B 3 1.0 3.0
AO1B 3 1.0 3.0
NOR3 3 1.0 3.0
OR3 3 1.0 3.0
NOR3A 3 1.0 3.0
BUFF 3 1.0 3.0
OR2B 2 1.0 2.0
MX2 2 1.0 2.0
OA1A 2 1.0 2.0
OR3B 2 1.0 2.0
OA1 2 1.0 2.0
OA1C 1 1.0 1.0
AO1C 1 1.0 1.0
CLKINT 1 0.0 0.0
OA1B 1 1.0 1.0
DFN1P1 1 1.0 1.0
AXOI5 1 1.0 1.0
AXO2 1 1.0 1.0
AX1C 1 1.0 1.0
----- ----------
TOTAL 361 290.0
Mapper successful!
Process took 0h:00m:02s realtime, 0h:00m:01s cputime
# Mon Sep 18 16:29:52 2006
###########################################################]
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