cpld_bus.vwf

来自「CPLD的VerilogHDL总线代码,在EPM7128SLC84-10+Qua」· VWF 代码 · 共 2,130 行 · 第 1/3 页

VWF
2,130 行
字号
123
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("addr_data[4]~result")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("addr_data[3]~result")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("addr_data[2]~result")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("addr_data[1]~result")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("addr_data[0]~result")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

TRANSITION_LIST("addr_data[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 20.0;
		LEVEL 1 FOR 165.0;
		LEVEL Z FOR 815.0;
	}
}

TRANSITION_LIST("addr_data[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 20.0;
		LEVEL 0 FOR 165.0;
		LEVEL Z FOR 815.0;
	}
}

TRANSITION_LIST("addr_data[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 20.0;
		LEVEL 0 FOR 165.0;
		LEVEL Z FOR 815.0;
	}
}

TRANSITION_LIST("addr_data[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 20.0;
		LEVEL 0 FOR 165.0;
		LEVEL Z FOR 815.0;
	}
}

TRANSITION_LIST("addr_data[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 20.0;
		LEVEL 0 FOR 165.0;
		LEVEL Z FOR 815.0;
	}
}

TRANSITION_LIST("addr_data[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 20.0;
		LEVEL 0 FOR 165.0;
		LEVEL Z FOR 815.0;
	}
}

TRANSITION_LIST("addr_data[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 20.0;
		LEVEL 0 FOR 165.0;
		LEVEL Z FOR 815.0;
	}
}

TRANSITION_LIST("addr_data[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 20.0;
		LEVEL 0 FOR 165.0;
		LEVEL Z FOR 815.0;
	}
}

TRANSITION_LIST("ALE_E")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 35.0;
		LEVEL 1 FOR 90.0;
		LEVEL 0 FOR 875.0;
	}
}

TRANSITION_LIST("clk")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 20;
			LEVEL 0 FOR 25.0;
			LEVEL 1 FOR 25.0;
		}
	}
}

TRANSITION_LIST("reset")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 1000.0;
	}
}

TRANSITION_LIST("RD_N")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 260.0;
		LEVEL 0 FOR 80.0;
		LEVEL 1 FOR 660.0;
	}
}

TRANSITION_LIST("PSEN_N")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 35.0;
		LEVEL 1 FOR 965.0;
	}
}

TRANSITION_LIST("WR_N")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 1000.0;
	}
}

TRANSITION_LIST("addr[15]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("addr[14]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("addr[13]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("addr[12]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("addr[11]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("addr[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("addr[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("addr[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("data_out7")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("data_out6")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("data_out5")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("data_out4")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("data_out3")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("data_out2")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("data_out1")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("data_out0")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("data_out17")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out16")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out15")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out14")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out13")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out12")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out11")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out10")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out27")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out26")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out25")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out24")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out23")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out22")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out21")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out20")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out37")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out36")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out35")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out34")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out33")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out32")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out31")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out30")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out47")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out46")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out45")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out44")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out43")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out42")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out41")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("data_out40")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 1000.0;
	}
}

TRANSITION_LIST("addr_data[7]~result")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 20.0;
		LEVEL 1 FOR 165.0;
		LEVEL Z FOR 105.0;
		LEVEL 0 FOR 50.0;
		LEVEL Z FOR 660.0;
	}
}

TRANSITION_LIST("addr_data[6]~result")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 20.0;
		LEVEL 0 FOR 165.0;
		LEVEL Z FOR 105.0;
		LEVEL 0 FOR 50.0;
		LEVEL Z FOR 660.0;
	}
}

TRANSITION_LIST("addr_data[5]~result")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 20.0;
		LEVEL 0 FOR 165.0;
		LEVEL Z FOR 105.0;
		LEVEL 0 FOR 50.0;
		LEVEL Z FOR 660.0;
	}
}

TRANSITION_LIST("addr_data[4]~result")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 20.0;
		LEVEL 0 FOR 165.0;
		LEVEL Z FOR 105.0;
		LEVEL 0 FOR 50.0;
		LEVEL Z FOR 660.0;
	}
}

TRANSITION_LIST("addr_data[3]~result")
{
	NODE
	{
		REPEAT = 1;
		LEVEL Z FOR 20.0;
		LEVEL 0 FOR 165.0;
		LEVEL Z FOR 105.0;
		LEVEL 0 FOR 50.0;
		LEVEL Z FOR 660.0;
	}
}

TRANSITION_LIST("addr_data[2]~result")
{
123

cpld_bus.vwf - 源码说明

本页面展示了「CPLD的VerilogHDL总线代码,在EPM7128SLC84-10+Quartus4平台上运行通过.」中的 cpld_bus.vwf 源码文件，采用 VWF 编程语言编写，共 2,130 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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