latch1.hier_info

FPGA光电编码器输入模块

|LATCH1
CLR => REG_TEMP~0.OUTPUTSELECT
CLR => REG_TEMP~1.OUTPUTSELECT
CLR => REG_TEMP~2.OUTPUTSELECT
CLR => REG_TEMP~3.OUTPUTSELECT
CLR => REG_TEMP~4.OUTPUTSELECT
CLR => REG_TEMP~5.OUTPUTSELECT
CLR => REG_TEMP~6.OUTPUTSELECT
CLR => REG_TEMP~7.OUTPUTSELECT
CLR => REG_TEMP~8.OUTPUTSELECT
CLR => REG_TEMP~9.OUTPUTSELECT
CLR => REG_TEMP~10.OUTPUTSELECT
CLR => REG_TEMP~11.OUTPUTSELECT
CLR => REG_TEMP~12.OUTPUTSELECT
CLR => REG_TEMP~13.OUTPUTSELECT
CLR => REG_TEMP~14.OUTPUTSELECT
CLR => REG_TEMP~15.OUTPUTSELECT
CE => REG_TEMP[14].CLK
CE => REG_TEMP[13].CLK
CE => REG_TEMP[12].CLK
CE => REG_TEMP[11].CLK
CE => REG_TEMP[10].CLK
CE => REG_TEMP[9].CLK
CE => REG_TEMP[8].CLK
CE => REG_TEMP[7].CLK
CE => REG_TEMP[6].CLK
CE => REG_TEMP[5].CLK
CE => REG_TEMP[4].CLK
CE => REG_TEMP[3].CLK
CE => REG_TEMP[2].CLK
CE => REG_TEMP[1].CLK
CE => REG_TEMP[0].CLK
CE => always1~0.OE
CE => always1~1.OE
CE => always1~2.OE
CE => always1~3.OE
CE => always1~4.OE
CE => always1~5.OE
CE => always1~6.OE
CE => always1~7.OE
CE => always1~8.OE
CE => always1~9.OE
CE => always1~10.OE
CE => always1~11.OE
CE => always1~12.OE
CE => always1~13.OE
CE => always1~14.OE
CE => always1~15.OE
CE => REG_TEMP[15].CLK
PULSE_COUNT[0] => REG_TEMP~15.DATAA
PULSE_COUNT[1] => REG_TEMP~14.DATAA
PULSE_COUNT[2] => REG_TEMP~13.DATAA
PULSE_COUNT[3] => REG_TEMP~12.DATAA
PULSE_COUNT[4] => REG_TEMP~11.DATAA
PULSE_COUNT[5] => REG_TEMP~10.DATAA
PULSE_COUNT[6] => REG_TEMP~9.DATAA
PULSE_COUNT[7] => REG_TEMP~8.DATAA
PULSE_COUNT[8] => REG_TEMP~7.DATAA
PULSE_COUNT[9] => REG_TEMP~6.DATAA
PULSE_COUNT[10] => REG_TEMP~5.DATAA
PULSE_COUNT[11] => REG_TEMP~4.DATAA
PULSE_COUNT[12] => REG_TEMP~3.DATAA
PULSE_COUNT[13] => REG_TEMP~2.DATAA
PULSE_COUNT[14] => REG_TEMP~1.DATAA
PULSE_COUNT[15] => REG_TEMP~0.DATAA
PC_OUT[0] <= always1~15.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[1] <= always1~14.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[2] <= always1~13.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[3] <= always1~12.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[4] <= always1~11.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[5] <= always1~10.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[6] <= always1~9.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[7] <= always1~8.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[8] <= always1~7.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[9] <= always1~6.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[10] <= always1~5.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[11] <= always1~4.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[12] <= always1~3.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[13] <= always1~2.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[14] <= always1~1.DB_MAX_OUTPUT_PORT_TYPE
PC_OUT[15] <= always1~0.DB_MAX_OUTPUT_PORT_TYPE