latch1.map.summary

来自「FPGA光电编码器输入模块」· SUMMARY 代码 · 共 13 行

Analysis & Synthesis Status : Successful - Wed Jun 14 11:01:42 2006
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Web Edition
Revision Name : LATCH1
Top-level Entity Name : LATCH1
Family : Cyclone II
Total combinational functions : 16
Total registers : 16
Total pins : 34
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0