cfb_sp.fit.eqn

FPGA光电编码器输入模块

D1L15 = (D1_PULSE_COUNT[4] $ B1_inst26 $ !D1L13) # GND;

--D1L16 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[4]~251 at LCCOMB_X2_Y8_N8
D1L16 = CARRY(D1_PULSE_COUNT[4] & (B1_inst26 # !D1L13) # !D1_PULSE_COUNT[4] & B1_inst26 & !D1L13);


--D1L18 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[5]~252 at LCCOMB_X2_Y8_N10
D1L18 = D1_PULSE_COUNT[5] & (B1_inst26 & D1L16 & VCC # !B1_inst26 & !D1L16) # !D1_PULSE_COUNT[5] & (B1_inst26 & !D1L16 # !B1_inst26 & (D1L16 # GND));

--D1L19 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[5]~253 at LCCOMB_X2_Y8_N10
D1L19 = CARRY(D1_PULSE_COUNT[5] & !B1_inst26 & !D1L16 # !D1_PULSE_COUNT[5] & (!D1L16 # !B1_inst26));


--D1L21 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[6]~254 at LCCOMB_X2_Y8_N12
D1L21 = (D1_PULSE_COUNT[6] $ B1_inst26 $ !D1L19) # GND;

--D1L22 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[6]~255 at LCCOMB_X2_Y8_N12
D1L22 = CARRY(D1_PULSE_COUNT[6] & (B1_inst26 # !D1L19) # !D1_PULSE_COUNT[6] & B1_inst26 & !D1L19);


--D1L24 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[7]~256 at LCCOMB_X2_Y8_N14
D1L24 = B1_inst26 & (D1_PULSE_COUNT[7] & D1L22 & VCC # !D1_PULSE_COUNT[7] & !D1L22) # !B1_inst26 & (D1_PULSE_COUNT[7] & !D1L22 # !D1_PULSE_COUNT[7] & (D1L22 # GND));

--D1L25 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[7]~257 at LCCOMB_X2_Y8_N14
D1L25 = CARRY(B1_inst26 & !D1_PULSE_COUNT[7] & !D1L22 # !B1_inst26 & (!D1L22 # !D1_PULSE_COUNT[7]));


--D1L27 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[8]~258 at LCCOMB_X2_Y8_N16
D1L27 = (D1_PULSE_COUNT[8] $ B1_inst26 $ !D1L25) # GND;

--D1L28 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[8]~259 at LCCOMB_X2_Y8_N16
D1L28 = CARRY(D1_PULSE_COUNT[8] & (B1_inst26 # !D1L25) # !D1_PULSE_COUNT[8] & B1_inst26 & !D1L25);


--D1L30 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9]~260 at LCCOMB_X2_Y8_N18
D1L30 = D1_PULSE_COUNT[9] & (B1_inst26 & D1L28 & VCC # !B1_inst26 & !D1L28) # !D1_PULSE_COUNT[9] & (B1_inst26 & !D1L28 # !B1_inst26 & (D1L28 # GND));

--D1L31 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9]~261 at LCCOMB_X2_Y8_N18
D1L31 = CARRY(D1_PULSE_COUNT[9] & !B1_inst26 & !D1L28 # !D1_PULSE_COUNT[9] & (!D1L28 # !B1_inst26));


--D1L33 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10]~262 at LCCOMB_X2_Y8_N20
D1L33 = (D1_PULSE_COUNT[10] $ B1_inst26 $ !D1L31) # GND;

--D1L34 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10]~263 at LCCOMB_X2_Y8_N20
D1L34 = CARRY(D1_PULSE_COUNT[10] & (B1_inst26 # !D1L31) # !D1_PULSE_COUNT[10] & B1_inst26 & !D1L31);


--D1L36 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11]~264 at LCCOMB_X2_Y8_N22
D1L36 = D1_PULSE_COUNT[11] & (B1_inst26 & D1L34 & VCC # !B1_inst26 & !D1L34) # !D1_PULSE_COUNT[11] & (B1_inst26 & !D1L34 # !B1_inst26 & (D1L34 # GND));

--D1L37 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11]~265 at LCCOMB_X2_Y8_N22
D1L37 = CARRY(D1_PULSE_COUNT[11] & !B1_inst26 & !D1L34 # !D1_PULSE_COUNT[11] & (!D1L34 # !B1_inst26));


--D1L39 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12]~266 at LCCOMB_X2_Y8_N24
D1L39 = (D1_PULSE_COUNT[12] $ B1_inst26 $ !D1L37) # GND;

--D1L40 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12]~267 at LCCOMB_X2_Y8_N24
D1L40 = CARRY(D1_PULSE_COUNT[12] & (B1_inst26 # !D1L37) # !D1_PULSE_COUNT[12] & B1_inst26 & !D1L37);


--D1L42 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13]~268 at LCCOMB_X2_Y8_N26
D1L42 = D1_PULSE_COUNT[13] & (B1_inst26 & D1L40 & VCC # !B1_inst26 & !D1L40) # !D1_PULSE_COUNT[13] & (B1_inst26 & !D1L40 # !B1_inst26 & (D1L40 # GND));

--D1L43 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13]~269 at LCCOMB_X2_Y8_N26
D1L43 = CARRY(D1_PULSE_COUNT[13] & !B1_inst26 & !D1L40 # !D1_PULSE_COUNT[13] & (!D1L40 # !B1_inst26));


--D1L45 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14]~270 at LCCOMB_X2_Y8_N28
D1L45 = (D1_PULSE_COUNT[14] $ B1_inst26 $ !D1L43) # GND;

--D1L46 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14]~271 at LCCOMB_X2_Y8_N28
D1L46 = CARRY(D1_PULSE_COUNT[14] & (B1_inst26 # !D1L43) # !D1_PULSE_COUNT[14] & B1_inst26 & !D1L43);


--D1L48 is PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[15]~272 at LCCOMB_X2_Y8_N30
D1L48 = B1_inst26 $ D1L46 $ D1_PULSE_COUNT[15];


--B1L7 is F4:F4|inst21~156 at LCCOMB_X1_Y9_N6
B1L7 = B1_inst & (B1_inst4 & !B1_inst6 # !B1_inst4 & (!B1_inst5)) # !B1_inst & (B1_inst4 & (B1_inst5) # !B1_inst4 & B1_inst6);


--B1L8 is F4:F4|inst22~153 at LCCOMB_X1_Y9_N22
B1L8 = B1_inst6 & (B1_inst5 & !B1_inst4 # !B1_inst5 & (B1_inst)) # !B1_inst6 & (B1_inst5 & (!B1_inst) # !B1_inst5 & B1_inst4);


--B1_inst26 is F4:F4|inst26 at LCCOMB_X1_Y9_N8
B1_inst26 = !B1L7 & (B1_inst26 # B1L8);


--CE is CE at PIN_23
--operation mode is input

CE = INPUT();


--CLR is CLR at PIN_27
--operation mode is input

CLR = INPUT();


--INB is INB at PIN_6
--operation mode is input

INB = INPUT();


--CLK is CLK at PIN_24
--operation mode is input

CLK = INPUT();


--INA is INA at PIN_28
--operation mode is input

INA = INPUT();


--PC_OUT[0] is PC_OUT[0] at PIN_44
--operation mode is output

PC_OUT[0]_tri_out = TRI(C1_REG_TEMP[0], CE);
PC_OUT[0] = OUTPUT(PC_OUT[0]_tri_out);


--PC_OUT[1] is PC_OUT[1] at PIN_39
--operation mode is output

PC_OUT[1]_tri_out = TRI(C1_REG_TEMP[1], CE);
PC_OUT[1] = OUTPUT(PC_OUT[1]_tri_out);


--PC_OUT[2] is PC_OUT[2] at PIN_41
--operation mode is output

PC_OUT[2]_tri_out = TRI(C1_REG_TEMP[2], CE);
PC_OUT[2] = OUTPUT(PC_OUT[2]_tri_out);


--PC_OUT[3] is PC_OUT[3] at PIN_14
--operation mode is output

PC_OUT[3]_tri_out = TRI(C1_REG_TEMP[3], CE);
PC_OUT[3] = OUTPUT(PC_OUT[3]_tri_out);


--PC_OUT[4] is PC_OUT[4] at PIN_43
--operation mode is output

PC_OUT[4]_tri_out = TRI(C1_REG_TEMP[4], CE);
PC_OUT[4] = OUTPUT(PC_OUT[4]_tri_out);


--PC_OUT[5] is PC_OUT[5] at PIN_30
--operation mode is output

PC_OUT[5]_tri_out = TRI(C1_REG_TEMP[5], CE);
PC_OUT[5] = OUTPUT(PC_OUT[5]_tri_out);


--PC_OUT[6] is PC_OUT[6] at PIN_37
--operation mode is output

PC_OUT[6]_tri_out = TRI(C1_REG_TEMP[6], CE);
PC_OUT[6] = OUTPUT(PC_OUT[6]_tri_out);


--PC_OUT[7] is PC_OUT[7] at PIN_35
--operation mode is output

PC_OUT[7]_tri_out = TRI(C1_REG_TEMP[7], CE);
PC_OUT[7] = OUTPUT(PC_OUT[7]_tri_out);


--PC_OUT[8] is PC_OUT[8] at PIN_31
--operation mode is output

PC_OUT[8]_tri_out = TRI(C1_REG_TEMP[8], CE);
PC_OUT[8] = OUTPUT(PC_OUT[8]_tri_out);


--PC_OUT[9] is PC_OUT[9] at PIN_33
--operation mode is output

PC_OUT[9]_tri_out = TRI(C1_REG_TEMP[9], CE);
PC_OUT[9] = OUTPUT(PC_OUT[9]_tri_out);


--PC_OUT[10] is PC_OUT[10] at PIN_45
--operation mode is output

PC_OUT[10]_tri_out = TRI(C1_REG_TEMP[10], CE);
PC_OUT[10] = OUTPUT(PC_OUT[10]_tri_out);


--PC_OUT[11] is PC_OUT[11] at PIN_40
--operation mode is output

PC_OUT[11]_tri_out = TRI(C1_REG_TEMP[11], CE);
PC_OUT[11] = OUTPUT(PC_OUT[11]_tri_out);


--PC_OUT[12] is PC_OUT[12] at PIN_12
--operation mode is output

PC_OUT[12]_tri_out = TRI(C1_REG_TEMP[12], CE);
PC_OUT[12] = OUTPUT(PC_OUT[12]_tri_out);


--PC_OUT[13] is PC_OUT[13] at PIN_34
--operation mode is output

PC_OUT[13]_tri_out = TRI(C1_REG_TEMP[13], CE);
PC_OUT[13] = OUTPUT(PC_OUT[13]_tri_out);


--PC_OUT[14] is PC_OUT[14] at PIN_11
--operation mode is output

PC_OUT[14]_tri_out = TRI(C1_REG_TEMP[14], CE);
PC_OUT[14] = OUTPUT(PC_OUT[14]_tri_out);


--PC_OUT[15] is PC_OUT[15] at PIN_15
--operation mode is output

PC_OUT[15]_tri_out = TRI(C1_REG_TEMP[15], CE);
PC_OUT[15] = OUTPUT(PC_OUT[15]_tri_out);





--A1L4 is CLK~clkctrl at CLKCTRL_G1
A1L4 = cycloneii_clkctrl(.INCLK[0] = CLK) WITH (clock_type = "Global Clock");


--A1L6 is CLR~clkctrl at CLKCTRL_G3
A1L6 = cycloneii_clkctrl(.INCLK[0] = CLR) WITH (clock_type = "Global Clock");


--B1L3 is F4:F4|inst1~clkctrl at CLKCTRL_G0
B1L3 = cycloneii_clkctrl(.INCLK[0] = B1_inst1) WITH (clock_type = "Global Clock");


--A1L2 is CE~clkctrl at CLKCTRL_G2
A1L2 = cycloneii_clkctrl(.INCLK[0] = CE) WITH (clock_type = "Global Clock");