📄 cfb_sp.sim.rpt
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; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9]~260 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9]~260 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10]~262 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10]~262 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11]~264 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11]~264 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12]~266 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12]~266 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13]~268 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13]~268 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14]~270 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14]~270 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[15]~272 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[15]~272 ; combout ;
; |CFB_SP|F4:F4|inst21~156 ; |CFB_SP|F4:F4|inst21~156 ; combout ;
; |CFB_SP|F4:F4|inst22~153 ; |CFB_SP|F4:F4|inst22~153 ; combout ;
; |CFB_SP|F4:F4|inst26 ; |CFB_SP|F4:F4|inst26 ; combout ;
; |CFB_SP|CE ; |CFB_SP|CE ; combout ;
; |CFB_SP|INB ; |CFB_SP|INB ; combout ;
; |CFB_SP|CLK ; |CFB_SP|CLK ; combout ;
; |CFB_SP|INA ; |CFB_SP|INA ; combout ;
; |CFB_SP|PC_OUT[0] ; |CFB_SP|PC_OUT[0] ; padio ;
; |CFB_SP|PC_OUT[1] ; |CFB_SP|PC_OUT[1] ; padio ;
; |CFB_SP|PC_OUT[2] ; |CFB_SP|PC_OUT[2] ; padio ;
; |CFB_SP|PC_OUT[3] ; |CFB_SP|PC_OUT[3] ; padio ;
; |CFB_SP|PC_OUT[4] ; |CFB_SP|PC_OUT[4] ; padio ;
; |CFB_SP|PC_OUT[5] ; |CFB_SP|PC_OUT[5] ; padio ;
; |CFB_SP|PC_OUT[6] ; |CFB_SP|PC_OUT[6] ; padio ;
; |CFB_SP|PC_OUT[7] ; |CFB_SP|PC_OUT[7] ; padio ;
; |CFB_SP|CLK~clkctrl ; |CFB_SP|CLK~clkctrl ; outclk ;
; |CFB_SP|F4:F4|inst1~clkctrl ; |CFB_SP|F4:F4|inst1~clkctrl ; outclk ;
; |CFB_SP|CE~clkctrl ; |CFB_SP|CE~clkctrl ; outclk ;
+-----------------------------------------------------+-----------------------------------------------------+------------------+
The following table displays output ports that do not toggle to 1 during simulation.
+------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage ;
+-----------------------------------------------------+-----------------------------------------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+-----------------------------------------------------+-----------------------------------------------------+------------------+
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[8] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[8] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[9] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[9] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[10] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[10] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[11] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[11] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[12] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[12] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[13] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[13] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[14] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[14] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[15] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[15] ; regout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[8] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[8] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~218 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~218 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~219 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~219 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~220 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~220 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~221 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~221 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~222 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~222 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~223 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~223 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~224 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~224 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[15] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[15] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~225 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~225 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[8]~258 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[8]~259 ; cout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9]~260 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9]~261 ; cout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10]~262 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10]~263 ; cout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11]~264 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11]~265 ; cout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12]~266 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12]~267 ; cout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13]~268 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13]~269 ; cout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14]~270 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14]~271 ; cout ;
; |CFB_SP|PC_OUT[8] ; |CFB_SP|PC_OUT[8] ; padio ;
; |CFB_SP|PC_OUT[9] ; |CFB_SP|PC_OUT[9] ; padio ;
; |CFB_SP|PC_OUT[10] ; |CFB_SP|PC_OUT[10] ; padio ;
; |CFB_SP|PC_OUT[11] ; |CFB_SP|PC_OUT[11] ; padio ;
; |CFB_SP|PC_OUT[12] ; |CFB_SP|PC_OUT[12] ; padio ;
; |CFB_SP|PC_OUT[13] ; |CFB_SP|PC_OUT[13] ; padio ;
; |CFB_SP|PC_OUT[14] ; |CFB_SP|PC_OUT[14] ; padio ;
; |CFB_SP|PC_OUT[15] ; |CFB_SP|PC_OUT[15] ; padio ;
+-----------------------------------------------------+-----------------------------------------------------+------------------+
The following table displays output ports that do not toggle to 0 during simulation.
+------------------------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage ;
+-----------------------------------------------------+-----------------------------------------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+-----------------------------------------------------+-----------------------------------------------------+------------------+
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[7] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[7] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[8] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[8] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[9] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[9] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[10] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[10] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[11] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[11] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[12] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[12] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[13] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[13] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[14] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[14] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP[15] ; |CFB_SP|LATCH1:LATCH1|REG_TEMP[15] ; regout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[7] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[7] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~217 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~217 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[8] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[8] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~218 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~218 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~219 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~219 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~220 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~220 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~221 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~221 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~222 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~222 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~223 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~223 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~224 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~224 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[15] ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[15] ; regout ;
; |CFB_SP|LATCH1:LATCH1|REG_TEMP~225 ; |CFB_SP|LATCH1:LATCH1|REG_TEMP~225 ; combout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[8]~258 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[8]~259 ; cout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9]~260 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9]~261 ; cout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10]~262 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10]~263 ; cout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11]~264 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11]~265 ; cout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12]~266 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12]~267 ; cout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13]~268 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13]~269 ; cout ;
; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14]~270 ; |CFB_SP|PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14]~271 ; cout ;
; |CFB_SP|CLR ; |CFB_SP|CLR ; combout ;
; |CFB_SP|CLR~clkctrl ; |CFB_SP|CLR~clkctrl ; outclk ;
+-----------------------------------------------------+-----------------------------------------------------+------------------+
+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage ;
+--------+------------+
+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
Info: Version 5.1 Build 176 10/26/2005 SJ Web Edition
Info: Processing started: Wed Jun 14 14:46:14 2006
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off CFB_SP -c CFB_SP
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is 60.71 %
Info: Number of transitions in simulation is 10373
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
Info: Processing ended: Wed Jun 14 14:46:16 2006
Info: Elapsed time: 00:00:04
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