cfb_sp.fit.qmsg

FPGA光电编码器输入模块

{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "4.137 ns register register " "Info: Estimated most critical path is register to register delay of 4.137 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[0\] 1 REG LAB_X2_Y8 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X2_Y8; Fanout = 3; REG Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[0\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[0] } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.648 ns) + CELL(0.621 ns) 1.269 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[0\]~243 2 COMB LAB_X2_Y8 2 " "Info: 2: + IC(0.648 ns) + CELL(0.621 ns) = 1.269 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[0\]~243'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "1.269 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[0] PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[0]~243 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 1.430 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[1\]~245 3 COMB LAB_X2_Y8 2 " "Info: 3: + IC(0.000 ns) + CELL(0.161 ns) = 1.430 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[1\]~245'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[0]~243 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[1]~245 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 1.591 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[2\]~247 4 COMB LAB_X2_Y8 2 " "Info: 4: + IC(0.000 ns) + CELL(0.161 ns) = 1.591 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[2\]~247'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[1]~245 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[2]~247 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 1.752 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[3\]~249 5 COMB LAB_X2_Y8 2 " "Info: 5: + IC(0.000 ns) + CELL(0.161 ns) = 1.752 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[3\]~249'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[2]~247 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[3]~249 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 1.913 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[4\]~251 6 COMB LAB_X2_Y8 2 " "Info: 6: + IC(0.000 ns) + CELL(0.161 ns) = 1.913 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[4\]~251'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[3]~249 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[4]~251 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 2.074 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[5\]~253 7 COMB LAB_X2_Y8 2 " "Info: 7: + IC(0.000 ns) + CELL(0.161 ns) = 2.074 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[5\]~253'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[4]~251 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[5]~253 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 2.235 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[6\]~255 8 COMB LAB_X2_Y8 2 " "Info: 8: + IC(0.000 ns) + CELL(0.161 ns) = 2.235 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[6\]~255'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[5]~253 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[6]~255 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 2.396 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[7\]~257 9 COMB LAB_X2_Y8 2 " "Info: 9: + IC(0.000 ns) + CELL(0.161 ns) = 2.396 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[7\]~257'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[6]~255 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[7]~257 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 2.557 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[8\]~259 10 COMB LAB_X2_Y8 2 " "Info: 10: + IC(0.000 ns) + CELL(0.161 ns) = 2.557 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[8\]~259'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[7]~257 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[8]~259 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 2.718 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[9\]~261 11 COMB LAB_X2_Y8 2 " "Info: 11: + IC(0.000 ns) + CELL(0.161 ns) = 2.718 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[9\]~261'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[8]~259 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9]~261 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 2.879 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[10\]~263 12 COMB LAB_X2_Y8 2 " "Info: 12: + IC(0.000 ns) + CELL(0.161 ns) = 2.879 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[10\]~263'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9]~261 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10]~263 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 3.040 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[11\]~265 13 COMB LAB_X2_Y8 2 " "Info: 13: + IC(0.000 ns) + CELL(0.161 ns) = 3.040 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[11\]~265'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10]~263 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11]~265 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 3.201 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[12\]~267 14 COMB LAB_X2_Y8 2 " "Info: 14: + IC(0.000 ns) + CELL(0.161 ns) = 3.201 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[12\]~267'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11]~265 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12]~267 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 3.362 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[13\]~269 15 COMB LAB_X2_Y8 2 " "Info: 15: + IC(0.000 ns) + CELL(0.161 ns) = 3.362 ns; Loc. = LAB_X2_Y8; Fanout = 2; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[13\]~269'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12]~267 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13]~269 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 3.523 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[14\]~271 16 COMB LAB_X2_Y8 1 " "Info: 16: + IC(0.000 ns) + CELL(0.161 ns) = 3.523 ns; Loc. = LAB_X2_Y8; Fanout = 1; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[14\]~271'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.161 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13]~269 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14]~271 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 4.029 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[15\]~272 17 COMB LAB_X2_Y8 1 " "Info: 17: + IC(0.000 ns) + CELL(0.506 ns) = 4.029 ns; Loc. = LAB_X2_Y8; Fanout = 1; COMB Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[15\]~272'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.506 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14]~271 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[15]~272 } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 4.137 ns PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[15\] 18 REG LAB_X2_Y8 2 " "Info: 18: + IC(0.000 ns) + CELL(0.108 ns) = 4.137 ns; Loc. = LAB_X2_Y8; Fanout = 2; REG Node = 'PULSE_COUNT:PULSE_COUNT\|PULSE_COUNT\[15\]'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "0.108 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[15]~272 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[15] } "NODE_NAME" } "" } } { "pulse_count.v" "" { Text "D:/altera/fpga+dsp/CFB_SP/pulse_count.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.489 ns ( 84.34 % ) " "Info: Total cell delay = 3.489 ns ( 84.34 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.648 ns ( 15.66 % ) " "Info: Total interconnect delay = 0.648 ns ( 15.66 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "CFB_SP" "UNKNOWN" "V1" "D:/altera/fpga+dsp/CFB_SP/db/CFB_SP.quartus_db" { Floorplan "D:/altera/fpga+dsp/CFB_SP/" "" "4.137 ns" { PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[0] PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[0]~243 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[1]~245 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[2]~247 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[3]~249 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[4]~251 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[5]~253 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[6]~255 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[7]~257 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[8]~259 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[9]~261 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[10]~263 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[11]~265 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[12]~267 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[13]~269 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[14]~271 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[15]~272 PULSE_COUNT:PULSE_COUNT|PULSE_COUNT[15] } "NODE_NAME" } "" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 0 " "Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 0%" {  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:01 " "Info: Fitter routing operations ending: elapsed time is 00:00:01" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Opti