f4.fit.summary
来自「FPGA光电编码器输入模块」· SUMMARY 代码 · 共 15 行
SUMMARY
15 行
Fitter Status : Successful - Tue Jun 13 17:00:28 2006
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Web Edition
Revision Name : F4
Top-level Entity Name : F4
Family : Cyclone II
Device : EP2C5Q208C8
Timing Models : Preliminary
Total logic elements : 6 / 4,608 ( < 1 % )
Total registers : 5
Total pins : 6 / 142 ( 4 % )
Total virtual pins : 0
Total memory bits : 0 / 119,808 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % )
Total PLLs : 0 / 2 ( 0 % )
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