📄 cnt6.rpt
字号:
_EQ066 = _LC6_B20 & !q627 & q628
# !_LC1_B18 & _LC6_B20 & q628
# _LC1_B18 & _LC6_B20 & q627 & !q628;
-- Node name is ':462'
-- Equation name is '_LC6_B18', type is buried
_LC6_B18 = LCELL( _EQ067);
_EQ067 = !_LC1_B18 & _LC6_B20 & q627
# _LC1_B18 & _LC6_B20 & !q627;
-- Node name is ':471'
-- Equation name is '_LC2_B18', type is buried
_LC2_B18 = LCELL( _EQ068);
_EQ068 = !_LC2_B14 & _LC6_B20 & q626
# _LC2_B14 & _LC6_B20 & !q626;
-- Node name is ':480'
-- Equation name is '_LC8_B14', type is buried
_LC8_B14 = LCELL( _EQ069);
_EQ069 = _LC6_B20 & !q624 & q625
# _LC6_B20 & !_LC7_B14 & q625
# _LC6_B20 & _LC7_B14 & q624 & !q625;
-- Node name is ':489'
-- Equation name is '_LC6_B14', type is buried
_LC6_B14 = LCELL( _EQ070);
_EQ070 = _LC6_B20 & !q623 & q624
# !_LC1_A24 & _LC6_B20 & q624
# _LC1_A24 & _LC6_B20 & q623 & !q624;
-- Node name is ':498'
-- Equation name is '_LC4_B14', type is buried
_LC4_B14 = LCELL( _EQ071);
_EQ071 = !_LC1_A24 & _LC6_B20 & q623
# _LC1_A24 & _LC6_B20 & !q623;
-- Node name is ':507'
-- Equation name is '_LC6_A24', type is buried
_LC6_A24 = LCELL( _EQ072);
_EQ072 = _LC6_B20 & !q621 & q622
# !_LC3_A24 & _LC6_B20 & q622
# _LC3_A24 & _LC6_B20 & q621 & !q622;
-- Node name is ':516'
-- Equation name is '_LC4_A24', type is buried
_LC4_A24 = LCELL( _EQ073);
_EQ073 = !_LC3_A24 & _LC6_B20 & q621
# _LC3_A24 & _LC6_B20 & !q621;
-- Node name is ':525'
-- Equation name is '_LC4_A20', type is buried
_LC4_A20 = LCELL( _EQ074);
_EQ074 = _LC6_B20 & !q619 & q620
# !_LC1_A16 & _LC6_B20 & q620
# _LC1_A16 & _LC6_B20 & q619 & !q620;
-- Node name is ':534'
-- Equation name is '_LC6_A20', type is buried
_LC6_A20 = LCELL( _EQ075);
_EQ075 = !_LC1_A16 & _LC6_B20 & q619
# _LC1_A16 & _LC6_B20 & !q619;
-- Node name is ':543'
-- Equation name is '_LC6_A16', type is buried
_LC6_A16 = LCELL( _EQ076);
_EQ076 = _LC6_B20 & !q617 & q618
# !_LC3_A16 & _LC6_B20 & q618
# _LC3_A16 & _LC6_B20 & q617 & !q618;
-- Node name is ':552'
-- Equation name is '_LC4_A16', type is buried
_LC4_A16 = LCELL( _EQ077);
_EQ077 = !_LC3_A16 & _LC6_B20 & q617
# _LC3_A16 & _LC6_B20 & !q617;
-- Node name is ':561'
-- Equation name is '_LC8_A16', type is buried
_LC8_A16 = LCELL( _EQ078);
_EQ078 = _LC6_B20 & !q615 & q616
# _LC6_B20 & !_LC8_A21 & q616
# _LC6_B20 & _LC8_A21 & q615 & !q616;
-- Node name is ':570'
-- Equation name is '_LC7_A21', type is buried
_LC7_A21 = LCELL( _EQ079);
_EQ079 = _LC6_B20 & !_LC8_A21 & q615
# _LC6_B20 & _LC8_A21 & !q615;
-- Node name is ':579'
-- Equation name is '_LC5_A21', type is buried
_LC5_A21 = LCELL( _EQ080);
_EQ080 = _LC6_B20 & !q613 & q614
# _LC6_B20 & !_LC8_A19 & q614
# _LC6_B20 & _LC8_A19 & q613 & !q614;
-- Node name is ':588'
-- Equation name is '_LC3_A21', type is buried
_LC3_A21 = LCELL( _EQ081);
_EQ081 = _LC6_B20 & !_LC8_A19 & q613
# _LC6_B20 & _LC8_A19 & !q613;
-- Node name is ':597'
-- Equation name is '_LC2_A19', type is buried
_LC2_A19 = LCELL( _EQ082);
_EQ082 = _LC6_B20 & !q611 & q612
# !_LC1_A18 & _LC6_B20 & q612
# _LC1_A18 & _LC6_B20 & q611 & !q612;
-- Node name is ':606'
-- Equation name is '_LC4_A19', type is buried
_LC4_A19 = LCELL( _EQ083);
_EQ083 = !_LC1_A18 & _LC6_B20 & q611
# _LC1_A18 & _LC6_B20 & !q611;
-- Node name is ':615'
-- Equation name is '_LC7_A18', type is buried
_LC7_A18 = LCELL( _EQ084);
_EQ084 = !_LC2_A18 & _LC6_B20 & q610
# _LC2_A18 & _LC6_B20 & !q610;
-- Node name is ':624'
-- Equation name is '_LC5_A18', type is buried
_LC5_A18 = LCELL( _EQ085);
_EQ085 = _LC6_B20 & !q68 & q69
# !_LC3_A18 & _LC6_B20 & q69
# _LC3_A18 & _LC6_B20 & q68 & !q69;
-- Node name is ':633'
-- Equation name is '_LC7_A20', type is buried
_LC7_A20 = LCELL( _EQ086);
_EQ086 = _LC6_B20 & !q67 & q68
# !_LC4_B13 & _LC6_B20 & q68
# _LC4_B13 & _LC6_B20 & q67 & !q68;
-- Node name is ':642'
-- Equation name is '_LC3_A20', type is buried
_LC3_A20 = LCELL( _EQ087);
_EQ087 = !_LC4_B13 & _LC6_B20 & q67
# _LC4_B13 & _LC6_B20 & !q67;
-- Node name is ':651'
-- Equation name is '_LC7_B13', type is buried
_LC7_B13 = LCELL( _EQ088);
_EQ088 = _LC6_B20 & !q65 & q66
# !_LC5_B13 & _LC6_B20 & q66
# _LC5_B13 & _LC6_B20 & q65 & !q66;
-- Node name is ':660'
-- Equation name is '_LC2_B13', type is buried
_LC2_B13 = LCELL( _EQ089);
_EQ089 = _LC6_B20 & !q64 & q65
# !_LC1_B13 & _LC6_B20 & q65
# _LC1_B13 & _LC6_B20 & q64 & !q65;
-- Node name is ':669'
-- Equation name is '_LC1_B23', type is buried
_LC1_B23 = LCELL( _EQ090);
_EQ090 = _LC6_B20 & !q63 & q64
# !_LC4_B20 & _LC6_B20 & q64
# _LC4_B20 & _LC6_B20 & q63 & !q64;
-- Node name is '~678~1'
-- Equation name is '~678~1', location is LC6_B20, type is buried.
-- synthesized logic cell
_LC6_B20 = LCELL( _EQ091);
_EQ091 = en & !q60
# en & _LC1_B15;
-- Node name is ':678'
-- Equation name is '_LC2_B23', type is buried
_LC2_B23 = LCELL( _EQ092);
_EQ092 = !_LC4_B20 & _LC6_B20 & q63
# _LC4_B20 & _LC6_B20 & !q63;
-- Node name is ':687'
-- Equation name is '_LC5_B20', type is buried
_LC5_B20 = LCELL( _EQ093);
_EQ093 = _LC6_B20 & !q61 & q62
# _LC6_B20 & !q60 & q62
# _LC6_B20 & q60 & q61 & !q62;
-- Node name is ':696'
-- Equation name is '_LC3_B20', type is buried
_LC3_B20 = LCELL( _EQ094);
_EQ094 = _LC6_B20 & !q60 & q61
# _LC6_B20 & q60 & !q61;
-- Node name is ':783'
-- Equation name is '_LC1_A19', type is buried
_LC1_A19 = LCELL( _EQ095);
_EQ095 = ca & en;
Project Information f:\study\vhdl\clock\cnt6.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'FLEX10K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = off
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Use Quartus Fitter = on
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:00
Database Builder 00:00:00
Logic Synthesizer 00:00:01
Partitioner 00:00:00
Fitter 00:00:03
Timing SNF Extractor 00:00:00
Assembler 00:00:00
-------------------------- --------
Total Time 00:00:04
Memory Allocated
-----------------
Peak memory allocated during compilation = 19,099K
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -