📄 pcicfg.cpp
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/************************************************************************/
/* */
/* Version 1.19 */
/* by Ralf Brown */
/* */
/* File pcicfg.cpp PCI configuration data dumper */
/* LastEdit: 10jan99 */
/* */
/* (c) Copyright 1995,1996,1997,1998,1999 Ralf Brown */
/* */
/* This code may be freely redistributed in its entirety. Excerpts */
/* may be incorporated into other programs provided that credit is */
/* given. */
/* */
/************************************************************************/
#include <ctype.h>
#include <dos.h>
#include <io.h>
#include <limits.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#define VERSION "1.19"
#define lengthof(x) ((sizeof(x))/(sizeof(x[0])))
#ifdef __TURBOC__
# pragma option -a- /* byte alignment */
#endif /* __TURBOC__ */
#ifndef FALSE
# define FALSE (0)
#endif /* FALSE */
#ifndef TRUE
# define TRUE (!FALSE)
#endif /* TRUE */
/************************************************************************/
/* Manifest Constants */
/************************************************************************/
#define CAPLIST_BIT 0x0010 // does device have capabilities list?
#define MAX_LINE 512 // max length of a line in .PCI files
#define MAX_VENDOR_NAME 50 // max length of vendor's name
#define MAX_DEVICE_NAME 50 // max length of device name
#define MAX_VENDOR_DATA 16384 // maximum data per vendor
#define SIGNATURE "PCICFG" // PCICFG.DAT signature at start of file
#define SIGNATURE_LENGTH (sizeof(SIGNATURE)-1)
/************************************************************************/
/* Types */
/************************************************************************/
typedef unsigned char BYTE ;
typedef unsigned short WORD ;
typedef unsigned long DWORD ;
//----------------------------------------------------------------------
struct PCIcfg
{
WORD vendorID ;
WORD deviceID ;
WORD command_reg ;
WORD status_reg ;
BYTE revisionID ;
BYTE progIF ;
BYTE subclass ;
BYTE classcode ;
BYTE cacheline_size ;
BYTE latency ;
BYTE header_type ;
BYTE BIST ;
union
{
struct
{
DWORD base_address0 ;
DWORD base_address1 ;
DWORD base_address2 ;
DWORD base_address3 ;
DWORD base_address4 ;
DWORD base_address5 ;
DWORD CardBus_CIS ;
WORD subsystem_vendorID ;
WORD subsystem_deviceID ;
DWORD expansion_ROM ;
BYTE cap_ptr ;
BYTE reserved1[3] ;
DWORD reserved2[1] ;
BYTE interrupt_line ;
BYTE interrupt_pin ;
BYTE min_grant ;
BYTE max_latency ;
DWORD device_specific[48] ;
} nonbridge ;
struct
{
DWORD base_address0 ;
DWORD base_address1 ;
BYTE primary_bus ;
BYTE secondary_bus ;
BYTE subordinate_bus ;
BYTE secondary_latency ;
BYTE IO_base_low ;
BYTE IO_limit_low ;
WORD secondary_status ;
WORD memory_base_low ;
WORD memory_limit_low ;
WORD prefetch_base_low ;
WORD prefetch_limit_low ;
DWORD prefetch_base_high ;
DWORD prefetch_limit_high ;
WORD IO_base_high ;
WORD IO_limit_high ;
DWORD reserved2[1] ;
DWORD expansion_ROM ;
BYTE interrupt_line ;
BYTE interrupt_pin ;
WORD bridge_control ;
DWORD device_specific[48] ;
} bridge ;
struct
{
DWORD ExCa_base ;
BYTE cap_ptr ;
BYTE reserved05 ;
WORD secondary_status ;
BYTE PCI_bus ;
BYTE CardBus_bus ;
BYTE subordinate_bus ;
BYTE latency_timer ;
DWORD memory_base0 ;
DWORD memory_limit0 ;
DWORD memory_base1 ;
DWORD memory_limit1 ;
WORD IObase_0low ;
WORD IObase_0high ;
WORD IOlimit_0low ;
WORD IOlimit_0high ;
WORD IObase_1low ;
WORD IObase_1high ;
WORD IOlimit_1low ;
WORD IOlimit_1high ;
BYTE interrupt_line ;
BYTE interrupt_pin ;
WORD bridge_control ;
WORD subsystem_vendorID ;
WORD subsystem_deviceID ;
DWORD legacy_baseaddr ;
DWORD cardbus_reserved[14] ;
DWORD vendor_specific[32] ;
} cardbus ;
} ;
} ;
struct subclass_info
{
int subclass_code ;
const char *subclass_name ;
} ;
/************************************************************************/
/* Global Data */
/************************************************************************/
static const char * const class_names[] =
{
"reserved", // 00
"disk", // 01
"network", // 02
"display", // 03
"multimedia", // 04
"memory", // 05
"bridge", // 06
"communication", // 07
"system peripheral",// 08
"input", // 09
"docking station", // 0A
"CPU", // 0B
"serial bus", // 0C
} ;
static const subclass_info subclass_info_01[] =
{
{ 0x00, "SCSI" },
{ 0x01, "IDE" },
{ 0x02, "floppy" },
{ 0x03, "IPI"},
{ 0x04, "RAID" },
{ 0x80, "other" },
{ -1, 0 },
} ;
static const subclass_info subclass_info_02[] =
{
{ 0x00, "Ethernet" },
{ 0x01, "TokenRing" },
{ 0x02, "FDDI" },
{ 0x03, "ATM" },
{ 0x80, "other" },
{ -1, 0 },
} ;
static const subclass_info subclass_info_03[] =
{
{ 0x00, "VGA" },
{ 0x01, "SuperVGA" },
{ 0x02, "XGA" },
{ 0x80, "other" },
{ -1, 0 },
} ;
static const subclass_info subclass_info_04[] =
{
{ 0x00, "video" },
{ 0x01, "audio" },
{ 0x80, "other" },
{ -1, 0 },
} ;
static const subclass_info subclass_info_05[] =
{
{ 0x00, "RAM" },
{ 0x01, "Flash memory" },
{ 0x80, "other" },
{ -1, 0 },
} ;
static const subclass_info subclass_info_06[] =
{
{ 0x00, "CPU/PCI" },
{ 0x01, "PCI/ISA" },
{ 0x02, "PCI/EISA" },
{ 0x03, "PCI/MCA" },
{ 0x04, "PCI/PCI" },
{ 0x05, "PCI/PCMCIA" },
{ 0x06, "PCI/NuBus" },
{ 0x07, "PCI/CardBus" },
{ 0x80, "other" },
{ -1, 0 },
} ;
static const subclass_info subclass_info_07[] =
{
{ 0x00, "serial" },
{ 0x01, "parallel" },
{ 0x80, "other" },
{ -1, 0 },
} ;
static const subclass_info subclass_info_08[] =
{
{ 0x00, "PIC" },
{ 0x01, "DMAC" },
{ 0x02, "timer" },
{ 0x03, "RTC" },
{ 0x80, "other" },
{ -1, 0 },
} ;
static const subclass_info subclass_info_09[] =
{
{ 0x00, "keyboard" },
{ 0x01, "digitizer" },
{ 0x02, "mouse" },
{ 0x80, "other" },
{ -1, 0 },
} ;
static const subclass_info subclass_info_0A[] =
{
{ 0x00, "generic" },
{ 0x80, "other" },
{ -1, 0 },
} ;
static const subclass_info subclass_info_0B[] =
{
{ 0x00, "386" },
{ 0x01, "486" },
{ 0x02, "Pentium" },
{ 0x03, "P6" },
{ 0x10, "Alpha" },
{ 0x40, "coproc" },
{ 0x80, "other" },
{ -1, 0 },
} ;
static const subclass_info subclass_info_0C[] =
{
{ 0x00, "Firewire" },
{ 0x01, "ACCESS.bus" },
{ 0x02, "SSA" },
{ 0x03, "USB" },
{ 0x04, "Fiber Channel" },
{ 0x80, "other" },
{ -1, 0 },
} ;
static const subclass_info *subclass_data[] =
{
0, subclass_info_01, subclass_info_02,
subclass_info_03, subclass_info_04, subclass_info_05,
subclass_info_06, subclass_info_07, subclass_info_08,
subclass_info_09, subclass_info_0A, subclass_info_0B,
subclass_info_0C,
} ;
//----------------------------------------------------------------------
static const char *const command_bits[] =
{
"I/O-on",
"mem-on",
"busmstr",
"spec-cyc",
"invalidate",
"VGAsnoop",
"parity-err",
"wait-cyc",
"sys-err", // bit 8
"fast-trns", // bit 9
0, // bit 10
0, // bit 11
0, // bit 12
0, // bit 13
0, // bit 14
0, // bit 15
} ;
static const char *const status_bits[] =
{
0, // bit 0
0, // bit 1
0, // bit 2
0, // bit 3
"CapList", // bit 4
"66Mhz", // bit 5
"UDF", // bit 6
"fast-trns", // bit 7
"parity-err", // bit 8
0, // bits 9-10 are select timing
0,
"sig-abort", // bit 11
"rcv-abort", // bit 12
"mst-abort", // bit 13
"sig-serr", // bit 14
"det-parity", // bit 15
} ;
static const char *const bctrl_bits[] =
{
"parity-resp", // bit 0
0, // bit 1
"ISA", // bit 2
"VGA", // bit 3
0, // bit 4
"mst-abort", // bit 5
"bus-reset", // bit 6
"fast-b2b", // bit 7
} ;
static const char *const select_timing[] =
{
"fast",
"med",
"slow",
"???"
} ;
static const char *const PMC_bits[] =
{
0, // bits 0-2: version (001)
0,
0,
"PME-Clk", // bit 3: PM Event Clock
"aux-pwr-PME#", // bit 4: need aux power for PME#
"DevSpec Init", // bit 5
0, // bits 6-7: DynClk
0,
"FullClk",
"D1-supp",
"D2-supp",
"PME#-D0", // bit 11
"PME#-D1", // bit 12
"PME#-D2", // bit 13
"PME#-D3hot", // bit 14
"PME#-D3cold", // bit 15
} ;
/************************************************************************/
/* global variables */
/************************************************************************/
static int verbose = FALSE ;
static int terse = FALSE ;
static int first_device = TRUE ;
static int bypass_BIOS = FALSE ;
static int cfg_mech = 1 ; // PCI access mechanism: 1 or 2
static char *exe_directory = "." ;
static char *device_ID_data = 0 ;
/* format of ID data once loaded:
char* -> next vendor or 0
WORD vendor ID
ASCIZ vendor name
WORD device ID
ASCIZ device name
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