i2c_synplify.plg
来自「FPGA-CPLD_DesignTool(8-9-10)源代码」· PLG 代码 · 共 17 行
PLG
17 行
@P: Worst Slack : 990.202
@P: clk - Estimated Frequency : 102.1 MHz
@P: clk - Requested Frequency : 1.0 MHz
@P: clk - Estimated Period : 9.798
@P: clk - Requested Period : 1000.000
@P: clk - Slack : 990.202
@P: System - Estimated Frequency : 111.6 MHz
@P: System - Requested Frequency : 1.0 MHz
@P: System - Estimated Period : 8.957
@P: System - Requested Period : 1000.000
@P: System - Slack : 991.043
@P: i2c Part : xc2s200pq208-6
@P: i2c I/O primitives : 41
@P: i2c I/O Register bits : 14
@P: i2c Register bits (Non I/O) : 104 (2%)
@P: i2c Total Luts : 168 (3%)
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