top.v

FPGA-CPLD_DesignTool(8-9-10)源代码

  );
  X_BUF \instance_b/Q1_OUT/FFY/RSTOR  (
    .I(GSR),
    .O(\instance_b/Q1_OUT/FFY/RST )
  );
  X_FF \instance_b/Q1_OUT_37  (
    .I(\instance_b/Q1_OUT/DYMUX ),
    .CE(VCC),
    .CLK(\instance_b/Q1_OUT/CLKINV ),
    .SET(GND),
    .RST(\instance_b/Q1_OUT/FFY/RST ),
    .O(\instance_b/Q1_OUT )
  );
  X_BUF \instance_a/Q3_OUT/FFY/RSTOR  (
    .I(GSR),
    .O(\instance_a/Q3_OUT/FFY/RST )
  );
  X_FF \instance_a/Q3_OUT_38  (
    .I(\instance_a/Q3_OUT/DYMUX ),
    .CE(VCC),
    .CLK(\instance_a/Q3_OUT/CLKINV ),
    .SET(GND),
    .RST(\instance_a/Q3_OUT/FFY/RST ),
    .O(\instance_a/Q3_OUT )
  );
  X_BUF \instance_b/Q0_OUT/FFY/RSTOR  (
    .I(GSR),
    .O(\instance_b/Q0_OUT/FFY/RST )
  );
  X_FF \instance_b/Q0_OUT_39  (
    .I(\instance_b/Q0_OUT/DYMUX ),
    .CE(VCC),
    .CLK(\instance_b/Q0_OUT/CLKINV ),
    .SET(GND),
    .RST(\instance_b/Q0_OUT/FFY/RST ),
    .O(\instance_b/Q0_OUT )
  );
  X_BUF \c2a/FFY/RSTOR  (
    .I(GSR),
    .O(\c2a/FFY/RST )
  );
  X_FF \instance_c/C2A_OUT_reg  (
    .I(\c2a/DYMUX ),
    .CE(VCC),
    .CLK(\c2a/CLKINV ),
    .SET(GND),
    .RST(\c2a/FFY/RST ),
    .O(c2a)
  );
  X_BUF \instance_b/Q2_OUT/FFY/RSTOR  (
    .I(GSR),
    .O(\instance_b/Q2_OUT/FFY/RST )
  );
  X_FF \instance_b/Q2_OUT_40  (
    .I(\instance_b/Q2_OUT/DYMUX ),
    .CE(VCC),
    .CLK(\instance_b/Q2_OUT/CLKINV ),
    .SET(GND),
    .RST(\instance_b/Q2_OUT/FFY/RST ),
    .O(\instance_b/Q2_OUT )
  );
  defparam a_and_c.INIT = 16'h8888;
  X_LUT4 a_and_c (
    .ADR0(b2a),
    .ADR1(c2and2),
    .ADR2(VCC),
    .ADR3(VCC),
    .O(\a_and_c/G )
  );
  X_BUF \instance_a/Q2_OUT/FFY/RSTOR  (
    .I(GSR),
    .O(\instance_a/Q2_OUT/FFY/RST )
  );
  X_FF \instance_a/Q2_OUT_41  (
    .I(\instance_a/Q2_OUT/DYMUX ),
    .CE(VCC),
    .CLK(\instance_a/Q2_OUT/CLKINV ),
    .SET(GND),
    .RST(\instance_a/Q2_OUT/FFY/RST ),
    .O(\instance_a/Q2_OUT )
  );
  X_BUF \instance_c/MODC_OUT/FFY/RSTOR  (
    .I(GSR),
    .O(\instance_c/MODC_OUT/FFY/RST )
  );
  X_FF \instance_c/MODC_OUT_reg  (
    .I(\instance_c/MODC_OUT/DYMUX ),
    .CE(VCC),
    .CLK(\instance_c/MODC_OUT/CLKINV ),
    .SET(GND),
    .RST(\instance_c/MODC_OUT/FFY/RST ),
    .O(\instance_c/MODC_OUT )
  );
  X_BUF \instance_c/Q3_OUT/FFY/RSTOR  (
    .I(GSR),
    .O(\instance_c/Q3_OUT/FFY/RST )
  );
  X_FF \instance_c/Q3_OUT_reg  (
    .I(\instance_c/Q3_OUT/DYMUX ),
    .CE(VCC),
    .CLK(\instance_c/Q3_OUT/CLKINV ),
    .SET(GND),
    .RST(\instance_c/Q3_OUT/FFY/RST ),
    .O(\instance_c/Q3_OUT )
  );
  X_BUF \instance_c/Q2_OUT/FFY/RSTOR  (
    .I(GSR),
    .O(\instance_c/Q2_OUT/FFY/RST )
  );
  X_FF \instance_c/Q2_OUT_reg  (
    .I(\instance_c/Q2_OUT/DYMUX ),
    .CE(VCC),
    .CLK(\instance_c/Q2_OUT/CLKINV ),
    .SET(GND),
    .RST(\instance_c/Q2_OUT/FFY/RST ),
    .O(\instance_c/Q2_OUT )
  );
  X_BUF \b2top_obuft_t/FFY/RSTOR  (
    .I(GSR),
    .O(\b2top_obuft_t/FFY/RST )
  );
  X_FF \instance_b/B2TOP_OBUFT_T_OUT  (
    .I(\b2top_obuft_t/DYMUX ),
    .CE(VCC),
    .CLK(\b2top_obuft_t/CLKINV ),
    .SET(GND),
    .RST(\b2top_obuft_t/FFY/RST ),
    .O(b2top_obuft_t)
  );
  X_BUF \a2c/CLKINV_42  (
    .I(moda_clk),
    .O(\a2c/CLKINV )
  );
  X_BUF \a2c/SRFFMUX_43  (
    .I(\instance_a/Q3_OUT ),
    .O(\a2c/SRFFMUX )
  );
  X_BUF \a2c/YUSED  (
    .I(\a2c/G ),
    .O(\instance_a/N_11_i )
  );
  X_BUF \a2c/DYMUX_44  (
    .I(\instance_a/N_11_i ),
    .O(\a2c/DYMUX )
  );
  X_SFF \instance_a/A2C_OUT  (
    .I(\a2c/DYMUX ),
    .CE(VCC),
    .CLK(\a2c/CLKINV ),
    .SET(GSR),
    .RST(GND),
    .SSET(\a2c/SRFFMUX ),
    .SRST(GND),
    .O(a2c)
  );
  defparam \instance_a/N_12_i .INIT = 16'hFEFE;
  X_LUT4 \instance_a/N_12_i  (
    .ADR0(\instance_a/Q0_OUT ),
    .ADR1(\instance_a/Q1_OUT ),
    .ADR2(\instance_a/Q2_OUT ),
    .ADR3(VCC),
    .O(\a2c/G )
  );
  X_BUF \b2a/CLKINV_45  (
    .I(clk_top),
    .O(\b2a/CLKINV )
  );
  X_BUF \b2a/YUSED  (
    .I(\b2a/G ),
    .O(\instance_b/OR4_OUT )
  );
  X_BUF \b2a/DYMUX_46  (
    .I(\instance_b/OR4_OUT ),
    .O(\b2a/DYMUX )
  );
  X_BUF \b2a/XUSED  (
    .I(\b2a/F ),
    .O(\instance_b/AND4_OUT )
  );
  X_BUF \b2a/DXMUX_47  (
    .I(\instance_b/AND4_OUT ),
    .O(\b2a/DXMUX )
  );
  X_BUF \b2a/FFX/RSTOR  (
    .I(GSR),
    .O(\b2a/FFX/RST )
  );
  X_FF \instance_b/B2A_OUT  (
    .I(\b2a/DXMUX ),
    .CE(VCC),
    .CLK(\b2a/CLKINV ),
    .SET(GND),
    .RST(\b2a/FFX/RST ),
    .O(b2a)
  );
  X_BUF \b2a/FFY/RSTOR  (
    .I(GSR),
    .O(\b2a/FFY/RST )
  );
  X_FF \instance_b/MODB_OUT_48  (
    .I(\b2a/DYMUX ),
    .CE(VCC),
    .CLK(\b2a/CLKINV ),
    .SET(GND),
    .RST(\b2a/FFY/RST ),
    .O(\instance_b/MODB_OUT )
  );
  defparam \instance_b/OR4_OUT1 .INIT = 16'hFFFE;
  X_LUT4 \instance_b/OR4_OUT1  (
    .ADR0(\instance_b/Q2_OUT ),
    .ADR1(\instance_b/Q3_OUT ),
    .ADR2(\instance_b/Q0_OUT ),
    .ADR3(\instance_b/Q1_OUT ),
    .O(\b2a/G )
  );
  defparam \instance_b/AND4_OUT1 .INIT = 16'h8000;
  X_LUT4 \instance_b/AND4_OUT1  (
    .ADR0(\instance_b/Q0_OUT ),
    .ADR1(\instance_b/Q1_OUT ),
    .ADR2(\instance_b/Q2_OUT ),
    .ADR3(\instance_b/Q3_OUT ),
    .O(\b2a/F )
  );
  X_BUF \instance_c/C2TOP_OUT/CLKINV_49  (
    .I(modc_clk),
    .O(\instance_c/C2TOP_OUT/CLKINV )
  );
  X_BUF \instance_c/C2TOP_OUT/YUSED  (
    .I(\instance_c/C2TOP_OUT/G ),
    .O(\instance_c/OR4_OUT )
  );
  X_BUF \instance_c/C2TOP_OUT/DYMUX_50  (
    .I(\instance_c/OR4_OUT ),
    .O(\instance_c/C2TOP_OUT/DYMUX )
  );
  defparam \instance_c/C19 .INIT = 16'hFFFE;
  X_LUT4 \instance_c/C19  (
    .ADR0(\instance_c/Q0_OUT ),
    .ADR1(\instance_c/Q1_OUT ),
    .ADR2(\instance_c/Q2_OUT ),
    .ADR3(\instance_c/Q3_OUT ),
    .O(\instance_c/C2TOP_OUT/G )
  );
  X_BUF \instance_c/C2TOP_OUT/FFY/RSTOR  (
    .I(GSR),
    .O(\instance_c/C2TOP_OUT/FFY/RST )
  );
  X_FF \instance_c/C2TOP_OUT_reg  (
    .I(\instance_c/C2TOP_OUT/DYMUX ),
    .CE(VCC),
    .CLK(\instance_c/C2TOP_OUT/CLKINV ),
    .SET(GND),
    .RST(\instance_c/C2TOP_OUT/FFY/RST ),
    .O(\instance_c/C2TOP_OUT )
  );
  X_BUF \c2and2/CLKINV_51  (
    .I(clk_top),
    .O(\c2and2/CLKINV )
  );
  X_BUF \c2and2/YUSED  (
    .I(\c2and2/G ),
    .O(\instance_c/AND4_OUT )
  );
  X_BUF \c2and2/DYMUX_52  (
    .I(\instance_c/AND4_OUT ),
    .O(\c2and2/DYMUX )
  );
  X_BUF \c2and2/FFY/RSTOR  (
    .I(GSR),
    .O(\c2and2/FFY/RST )
  );
  X_FF \instance_c/C2AND2_OUT_reg  (
    .I(\c2and2/DYMUX ),
    .CE(VCC),
    .CLK(\c2and2/CLKINV ),
    .SET(GND),
    .RST(\c2and2/FFY/RST ),
    .O(c2and2)
  );
  defparam \instance_c/C18 .INIT = 16'h8000;
  X_LUT4 \instance_c/C18  (
    .ADR0(\instance_c/Q0_OUT ),
    .ADR1(\instance_c/Q1_OUT ),
    .ADR2(\instance_c/Q2_OUT ),
    .ADR3(\instance_c/Q3_OUT ),
    .O(\c2and2/G )
  );
  X_BUF \a2top_obuft_i/CLKINV_53  (
    .I(moda_clk),
    .O(\a2top_obuft_i/CLKINV )
  );
  X_INV \a2top_obuft_i/SRINV  (
    .I(\instance_a/Q3_OUT ),
    .O(\a2top_obuft_i/SRINVNOT )
  );
  X_BUF \a2top_obuft_i/SRFFMUX_54  (
    .I(\a2top_obuft_i/SRINVNOT ),
    .O(\a2top_obuft_i/SRFFMUX )
  );
  X_BUF \a2top_obuft_i/YUSED  (
    .I(\a2top_obuft_i/G ),
    .O(\instance_a/G_7 )
  );
  X_BUF \a2top_obuft_i/DYMUX_55  (
    .I(\instance_a/G_7 ),
    .O(\a2top_obuft_i/DYMUX )
  );
  defparam \instance_a/G_7_56 .INIT = 16'h8080;
  X_LUT4 \instance_a/G_7_56  (
    .ADR0(\instance_a/Q0_OUT ),
    .ADR1(\instance_a/Q1_OUT ),
    .ADR2(\instance_a/Q2_OUT ),
    .ADR3(VCC),
    .O(\a2top_obuft_i/G )
  );
  X_SFF \instance_a/A2TOP_OBUFT_I_OUT  (
    .I(\a2top_obuft_i/DYMUX ),
    .CE(VCC),
    .CLK(\a2top_obuft_i/CLKINV ),
    .SET(GND),
    .RST(GSR),
    .SSET(GND),
    .SRST(\a2top_obuft_i/SRFFMUX ),
    .O(a2top_obuft_i)
  );
  X_IPAD \top2a_c/PAD  (
    .PAD(top2a_c)
  );
  X_IPAD \modb_clk_pad/PAD  (
    .PAD(modb_clk_pad)
  );
  X_IPAD \dll_rst/PAD  (
    .PAD(dll_rst)
  );
  X_BUF \instance_a/Q1_OUT/FFY/RSTOR  (
    .I(GSR),
    .O(\instance_a/Q1_OUT/FFY/RST )
  );
  X_FF \instance_a/Q1_OUT_57  (
    .I(\instance_a/Q1_OUT/DYMUX ),
    .CE(VCC),
    .CLK(\instance_a/Q1_OUT/CLKINV ),
    .SET(GND),
    .RST(\instance_a/Q1_OUT/FFY/RST ),
    .O(\instance_a/Q1_OUT )
  );
  X_BUF \moda_out/GTS_OR_T_58  (
    .I(GTS),
    .O(\moda_out/GTS_OR_T )
  );
  X_INV \moda_out/ENABLEINV  (
    .I(\moda_out/GTS_OR_T ),
    .O(\moda_out/ENABLE )
  );
  X_TRI \instance_a/moda_out_obuf  (
    .I(\moda_out/O ),
    .CTL(\moda_out/ENABLE ),
    .O(moda_out)
  );
  X_OPAD \moda_out/PAD  (
    .PAD(moda_out)
  );
  X_IPAD \modb_data/PAD  (
    .PAD(modb_data)
  );
  X_IPAD \ipad_dll_clk_in/PAD  (
    .PAD(ipad_dll_clk_in)
  );
  X_IPAD \top2b/PAD  (
    .PAD(top2b)
  );
  X_BUF \modb_out/GTS_OR_T_59  (
    .I(GTS),
    .O(\modb_out/GTS_OR_T )
  );
  X_INV \modb_out/ENABLEINV  (
    .I(\modb_out/GTS_OR_T ),
    .O(\modb_out/ENABLE )
  );
  X_TRI \instance_b/modb_out_obuf  (
    .I(\modb_out/O ),
    .CTL(\modb_out/ENABLE ),
    .O(modb_out)
  );
  X_OPAD \modb_out/PAD  (
    .PAD(modb_out)
  );
  X_BUF \mod_c_out/GTS_OR_T_60  (
    .I(GTS),
    .O(\mod_c_out/GTS_OR_T )
  );
  X_INV \mod_c_out/ENABLEINV  (
    .I(\mod_c_out/GTS_OR_T ),
    .O(\mod_c_out/ENABLE )
  );
  X_TRI \instance_c/mod_c_out_obuf  (
    .I(\mod_c_out/O ),
    .CTL(\mod_c_out/ENABLE ),
    .O(mod_c_out)
  );
  X_OPAD \mod_c_out/PAD  (
    .PAD(mod_c_out)
  );
  X_IPAD \moda_clk_pad/PAD  (
    .PAD(moda_clk_pad)
  );
  X_IPAD \modc_clk_pad/PAD  (
    .PAD(modc_clk_pad)
  );
  X_BUF \modc_out/GTS_OR_T_61  (
    .I(GTS),
    .O(\modc_out/GTS_OR_T )
  );
  X_INV \modc_out/ENABLEINV  (
    .I(\modc_out/GTS_OR_T ),
    .O(\modc_out/ENABLE )
  );
  X_TRI \instance_c/modc_out_obuf  (
    .I(\modc_out/O ),
    .CTL(\modc_out/ENABLE ),
    .O(modc_out)
  );
  X_OPAD \modc_out/PAD  (
    .PAD(modc_out)
  );
  X_OR2 \obuft_out/GTS_OR_T_62  (
    .I0(GTS),
    .I1(\obuft_out/T ),
    .O(\obuft_out/GTS_OR_T )
  );
  X_INV \obuft_out/ENABLEINV  (
    .I(\obuft_out/GTS_OR_T ),
    .O(\obuft_out/ENABLE )
  );
  X_TRI obuft_out_obuft (
    .I(\obuft_out/O ),
    .CTL(\obuft_out/ENABLE ),
    .O(obuft_out)
  );
  X_OPAD \obuft_out/PAD  (
    .PAD(obuft_out)
  );
  X_BUF \instance_b/Q3_OUT/FFY/RSTOR  (
    .I(GSR),
    .O(\instance_b/Q3_OUT/FFY/RST )
  );
  X_FF \instance_b/Q3_OUT_63  (
    .I(\instance_b/Q3_OUT/DYMUX ),
    .CE(VCC),
    .CLK(\instance_b/Q3_OUT/CLKINV ),
    .SET(GND),
    .RST(\instance_b/Q3_OUT/FFY/RST ),
    .O(\instance_b/Q3_OUT )
  );
  X_BUF \instance_c/Q1_OUT/FFY/RSTOR  (
    .I(GSR),
    .O(\instance_c/Q1_OUT/FFY/RST )
  );
  X_FF \instance_c/Q1_OUT_reg  (
    .I(\instance_c/Q1_OUT/DYMUX ),
    .CE(VCC),
    .CLK(\instance_c/Q1_OUT/CLKINV ),
    .SET(GND),
    .RST(\instance_c/Q1_OUT/FFY/RST ),
    .O(\instance_c/Q1_OUT )
  );
  X_BUF top2a_c_ibuf (
    .I(top2a_c),
    .O(top2a_c_c)
  );
  X_BUF \bufg_modb/IBUFG_64  (
    .I(modb_clk_pad),
    .O(\bufg_modb/IBUFG )
  );
  X_BUF dll_rst_ibuf (
    .I(dll_rst),
    .O(dll_rst_c)
  );
  X_BUF \moda_out/OUTPUT/OFF/OMUX  (
    .I(\instance_a/MODA_OUT ),
    .O(\moda_out/O )
  );
  X_BUF \modb_out/OUTPUT/OFF/OMUX  (
    .I(\instance_b/MODB_OUT ),
    .O(\modb_out/O )
  );
  X_BUF \mod_c_out/OUTPUT/OFF/OMUX  (
    .I(\instance_c/C2TOP_OUT ),
    .O(\mod_c_out/O )
  );
  X_BUF \bufg_moda/IBUFG_65  (
    .I(moda_clk_pad),
    .O(\bufg_moda/IBUFG )
  );
  X_BUF \bufg_modc/IBUFG_66  (
    .I(modc_clk_pad),
    .O(\bufg_modc/IBUFG )
  );
  X_BUF \modc_out/OUTPUT/OFF/OMUX  (
    .I(\instance_c/MODC_OUT ),
    .O(\modc_out/O )
  );
  X_BUF \obuft_out/OUTPUT/TFF/TMUX  (
    .I(b2top_obuft_t),
    .O(\obuft_out/T )
  );
  X_BUF \obuft_out/OUTPUT/OFF/OMUX  (
    .I(a2top_obuft_i),
    .O(\obuft_out/O )
  );
  X_ZERO NlwBlock_top_GND (
    .O(GND)
  );
  X_ONE NlwBlock_top_VCC (
    .O(VCC)
  );
  X_PD NGD2VER_PD_00F36710 (.O (GSR) );
  X_PD NGD2VER_PD_00F36728 (.O (GTS) );
endmodule