📄 stopwatch.bld

📁 FPGA-CPLD_DesignTool(8-9-10)源代码

💻 BLD

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Release 6.2.02i - ngdbuild G.30Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.Command Line: ngdbuild -intstyle ise -dd c:\workstation\ise     
2004-05-13\cd\example-9-1\watch_sc_v6/_ngo -i -p xc2v40-fg256-5 stopwatch.ngc
stopwatch.ngd Reading NGO file "C:/workstation/ISE     
2004-05-13/CD/Example-9-1/watch_sc_v6/stopwatch.ngc" ...Reading component libraries for design expansion...Launcher: "tenths.ngo" is up to date.Loading design module "c:\workstation\ise     
2004-05-13\cd\example-9-1\watch_sc_v6\_ngo\tenths.ngo"...C_COUNTER_BINARY_V5_0, Coregen 6.2.02iChecking timing specifications ...Checking expanded design ...WARNING:NgdBuild:454 - logical net 'cnt60_t_XLXI_2/CEO' has no loadWARNING:NgdBuild:454 - logical net 'cnt60_t_XLXI_3/CEO' has no loadNGDBUILD Design Results Summary:  Number of errors:     0  Number of warnings:   2Total memory usage is 37080 kilobytesWriting NGD file "stopwatch.ngd" ...Writing NGDBUILD log file "stopwatch.bld"...

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