syn_incremental.prd

来自「FPGA-CPLD_DesignTool(8-9-10)源代码」· PRD 代码 · 共 14 行

#-- Synplicity, Inc.
#-- Version 7.5.1     
#-- Project file D:\CD\EXAMPLE-8-2\synplify_syn\Syn_Incremental.prd
#-- Written on Wed Jun 02 01:53:41 2004

#
### Watch Implementation type ###
#
watch_impl -active
#
### Watch Implementation properties ###
#
watch_prop -clear