top.bld

来自「FPGA-CPLD_DesignTool,事例程序1-2」· BLD 代码 · 共 31 行

BLD

31 行

Release 5.1i - ngdbuild F.23Copyright (c) 1995-2002 Xilinx, Inc.  All rights reserved.Command Line: ngdbuild -quiet -dd
j:\projects\ise\coregendemo\dpram_core_demo/_ngo -uc UCF_Demo.ucf
-insert_keep_hierarchy -p xc2vp50-ff1152-6 top.ngc top.ngd Reading NGO file "J:/projects/ISE/CoreGenDemo/DPRAM_core_Demo/top.ngc" ...Reading component libraries for design expansion...Launcher: Executing edif2ngd -noa "dpram_core.edn"
"j:\projects\ise\coregendemo\dpram_core_demo\_ngo\dpram_core.ngo"INFO:NgdBuild - Release 5.1i - edif2ngd F.23INFO:NgdBuild - Copyright (c) 1995-2002 Xilinx, Inc.  All rights reserved.Writing the design to"j:/projects/ise/coregendemo/dpram_core_demo/_ngo/dpram_core.ngo"...Loading design module
"j:\projects\ise\coregendemo\dpram_core_demo\_ngo\dpram_core.ngo"...Annotating constraints to design from file "UCF_Demo.ucf" ...Checking timing specifications ...Checking expanded design ...NGDBUILD Design Results Summary:  Number of errors:     0  Number of warnings:   0Writing NGD file "top.ngd" ...Writing NGDBUILD log file "top.bld"...

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